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Transaction-Level Modeling Framework for Space Applications

AHBMem Member List

This is the complete list of members for AHBMem, including all inherited members.

ahbAHBSlave<>
AHBDevice(ModuleName mn, uint32_t hindex, uint8_t vendorid, uint16_t deviceid, uint8_t version, uint8_t irq, BAR bar0, BAR bar1=BAR(), BAR bar2=BAR(), BAR bar3=BAR())AHBDevice< BaseModule< DefaultBase > >
AHBDevice(ModuleName mn)AHBDevice< BaseModule< DefaultBase > >
AHBMem(const ModuleName nm, uint16_t haddr_=0, uint16_t hmask_=0, AbstractionLayer ambaLayer=amba::amba_LT, uint32_t slave_id=0, bool cacheable=1, uint32_t wait_states=0, bool pow_mon=false)AHBMem
AHBSlave(ModuleName mn, uint8_t hindex, uint8_t vendor, uint8_t device, uint8_t version, uint8_t irq, AbstractionLayer ambaLayer, BAR bar0=BAR(), BAR bar1=BAR(), BAR bar2=BAR(), BAR bar3=BAR())AHBSlave<>
b_transport(tlm::tlm_generic_payload &gp, sc_time &delay)AHBSlave<>virtual
BaseMemory()BaseMemory
BaseModule(ModuleName mn)BaseModule< DefaultBase >inline
before_end_of_elaboration()AHBMem
clear_mem()AHBMeminline
clkCLKDevice
clkcng()CLKDeviceinlinevirtual
CLKDevice()CLKDevice
clock_cycleCLKDeviceprotected
dorst()AHBMemvirtual
dyn_read_energyAHBMem
dyn_read_energy_normAHBMem
dyn_readsAHBMem
dyn_write_energyAHBMem
dyn_write_energy_normAHBMem
dyn_writesAHBMem
end_of_simulation()AHBMem
erase(const uint32_t &start, const uint32_t &end)BaseMemory
erase_dbg(const uint32_t &start, const uint32_t &end)BaseMemory
exec_func(tlm::tlm_generic_payload &gp, sc_time &delay, bool debug=false)AHBMemvirtual
g_bar0AHBDevice< BaseModule< DefaultBase > >protected
g_bar0haddrAHBDevice< BaseModule< DefaultBase > >protected
g_bar0hcacheableAHBDevice< BaseModule< DefaultBase > >protected
g_bar0hmaskAHBDevice< BaseModule< DefaultBase > >protected
g_bar0hprefetchableAHBDevice< BaseModule< DefaultBase > >protected
g_bar0htypeAHBDevice< BaseModule< DefaultBase > >protected
g_bar1AHBDevice< BaseModule< DefaultBase > >protected
g_bar1haddrAHBDevice< BaseModule< DefaultBase > >protected
g_bar1hcacheableAHBDevice< BaseModule< DefaultBase > >protected
g_bar1hmaskAHBDevice< BaseModule< DefaultBase > >protected
g_bar1hprefetchableAHBDevice< BaseModule< DefaultBase > >protected
g_bar1htypeAHBDevice< BaseModule< DefaultBase > >protected
g_bar2AHBDevice< BaseModule< DefaultBase > >protected
g_bar2haddrAHBDevice< BaseModule< DefaultBase > >protected
g_bar2hcacheableAHBDevice< BaseModule< DefaultBase > >protected
g_bar2hmaskAHBDevice< BaseModule< DefaultBase > >protected
g_bar2hprefetchableAHBDevice< BaseModule< DefaultBase > >protected
g_bar2htypeAHBDevice< BaseModule< DefaultBase > >protected
g_bar3AHBDevice< BaseModule< DefaultBase > >protected
g_bar3haddrAHBDevice< BaseModule< DefaultBase > >protected
g_bar3hcacheableAHBDevice< BaseModule< DefaultBase > >protected
g_bar3hmaskAHBDevice< BaseModule< DefaultBase > >protected
g_bar3hprefetchableAHBDevice< BaseModule< DefaultBase > >protected
g_bar3htypeAHBDevice< BaseModule< DefaultBase > >protected
g_barsAHBDevice< BaseModule< DefaultBase > >protected
g_hdeviceidAHBDevice< BaseModule< DefaultBase > >protected
g_hindexAHBDevice< BaseModule< DefaultBase > >protected
g_hirqAHBDevice< BaseModule< DefaultBase > >protected
g_hvendoridAHBDevice< BaseModule< DefaultBase > >protected
g_hversionAHBDevice< BaseModule< DefaultBase > >protected
GC_HAS_CALLBACKS()AHBMem
get_ahb_bar_addr(uint32_t bar) constAHBDevice< BaseModule< DefaultBase > >virtual
get_ahb_bar_base(uint32_t bar) constAHBDevice< BaseModule< DefaultBase > >virtual
get_ahb_bar_cachable(uint32_t bar) constAHBDevice< BaseModule< DefaultBase > >inline
get_ahb_bar_mask(uint32_t bar) constAHBDevice< BaseModule< DefaultBase > >virtual
get_ahb_bar_prefetchable(uint32_t bar) constAHBDevice< BaseModule< DefaultBase > >inline
get_ahb_bar_relative_addr(uint32_t bar, uint32_t addr) constAHBDevice< BaseModule< DefaultBase > >virtual
get_ahb_bar_size(uint32_t bar) constAHBDevice< BaseModule< DefaultBase > >virtual
get_ahb_bar_type(uint32_t bar) constAHBDevice< BaseModule< DefaultBase > >virtual
get_ahb_base_addr()AHBDevice< BaseModule< DefaultBase > >virtual
get_ahb_base_addr_() constAHBDevice< BaseModule< DefaultBase > >virtual
get_ahb_device_id() constAHBDevice< BaseModule< DefaultBase > >virtual
get_ahb_device_info()AHBDevice< BaseModule< DefaultBase > >virtual
get_ahb_hindex() constAHBDevice< BaseModule< DefaultBase > >virtual
get_ahb_size()AHBDevice< BaseModule< DefaultBase > >virtual
get_ahb_size_() constAHBDevice< BaseModule< DefaultBase > >virtual
get_ahb_vendor_id() constAHBDevice< BaseModule< DefaultBase > >virtual
get_clock()AHBMemvirtual
get_direct_mem_ptr(tlm::tlm_generic_payload &trans, tlm::tlm_dmi &dmi_data)AHBMem
init(uint32_t hindex, uint8_t vendorid, uint16_t deviceid, uint8_t version, uint8_t irq, BAR bar0, BAR bar1=BAR(), BAR bar2=BAR(), BAR bar3=BAR())AHBDevice< BaseModule< DefaultBase > >
init_ahb_generics()AHBDevice< BaseModule< DefaultBase > >
init_counters()BaseModule< DefaultBase >inlinevirtual
init_generics()AHBMemvirtual
init_power()BaseModule< DefaultBase >inlinevirtual
init_registers()BaseModule< DefaultBase >inlinevirtual
int_powerAHBMem
int_power_cb(gs::gs_param_base &changed_param, gs::cnf::callback_type reason)AHBMem
int_power_normAHBMem
m_apiBaseModule< DefaultBase >protected
m_countersBaseModule< DefaultBase >protected
m_genericsBaseModule< DefaultBase >protected
m_powerBaseModule< DefaultBase >protected
m_readsAHBSlave<>protected
m_registerAHBDevice< BaseModule< DefaultBase > >protected
m_RequestPEQAHBSlave<>
m_ResponsePEQAHBSlave<>
m_storageBaseMemoryprotected
m_writesAHBSlave<>protected
nb_transport_fw(tlm::tlm_generic_payload &trans, tlm::tlm_phase &phase, sc_core::sc_time &delay)AHBSlave<>virtual
onclk(const sc_core::sc_time &value, const sc_core::sc_time &time)CLKDevicevirtual
onrst(const bool &value, const sc_core::sc_time &time)CLKDevicevirtual
powerAHBMem
power_frame_starting_timeAHBMem
power_model()AHBMem
print_ahb_device_info(char *name) constAHBDevice< BaseModule< DefaultBase > >virtual
print_transport_statistics(const char *name) constAHBSlave<>virtual
read(const uint32_t &addr)BaseMemory
read_block(const uint32_t &addr, uint8_t *data, const uint32_t &len)BaseMemory
read_block_dbg(const uint32_t &addr, uint8_t *data, const uint32_t &len) const BaseMemory
read_dbg(const uint32_t &addr)BaseMemory
readsBaseMemory
reads32BaseMemory
requestThread()AHBSlave<>
responseThread()AHBSlave<>
rstCLKDevice
SC_HAS_PROCESS(AHBMem)AHBMem
AHBSlave<>::SC_HAS_PROCESS(AHBSlave)AHBSlave<>
scireg_add_callback(scireg_callback &cb)scireg_ns::scireg_region_ifinlinevirtual
scireg_get_bit_attributes(vector_byte &v, scireg_bit_attributes_type t, sc_dt::uint64 size, sc_dt::uint64 offset=0) const scireg_ns::scireg_region_ifinlinevirtual
scireg_get_bit_width() const BaseMemoryinlinevirtual
scireg_get_byte_width() const scireg_ns::scireg_region_ifinlinevirtual
scireg_get_child_regions(std::vector< scireg_mapped_region > &mapped_regions, sc_dt::uint64 size=sc_dt::uint64(-1), sc_dt::uint64 offset=0) const scireg_ns::scireg_region_ifinlinevirtual
scireg_get_dmi_granted(bool &granted, sc_dt::uint64 size, sc_dt::uint64 offset=0) const BaseMemoryinlinevirtual
scireg_get_high_pos() const BaseMemoryinlinevirtual
scireg_get_low_pos() const BaseMemoryinlinevirtual
scireg_get_parent_modules(std::vector< sc_core::sc_module * > &v) const scireg_ns::scireg_region_ifinlinevirtual
scireg_get_parent_regions(std::vector< scireg_region_if * > &v) const scireg_ns::scireg_region_ifinlinevirtual
scireg_get_region_type(scireg_ns::scireg_region_type &t) const BaseMemoryinlinevirtual
scireg_get_string_attribute(const char *&s, scireg_string_attribute_type t) const scireg_ns::scireg_region_ifinlinevirtual
scireg_get_target_sockets(std::vector< sc_core::sc_object * > &v) const scireg_ns::scireg_region_ifinlinevirtual
scireg_get_value_info(std::vector< scireg_value_info > &v) const scireg_ns::scireg_region_ifinlinevirtual
scireg_read(scireg_ns::vector_byte &v, sc_dt::uint64 size, sc_dt::uint64 offset=0) const BaseMemoryinlinevirtual
scireg_region_if()scireg_ns::scireg_region_ifinline
scireg_remove_callback(scireg_callback &cb)scireg_ns::scireg_region_ifinlinevirtual
scireg_write(const scireg_ns::vector_byte &v, sc_dt::uint64 size, sc_dt::uint64 offset=0)BaseMemoryinlinevirtual
set_clk(sc_core::sc_clock &clk)CLKDevice
set_clk(sc_core::sc_time period)CLKDevice
set_clk(double period, sc_core::sc_time_unit base)CLKDevice
set_storage(std::string implementation, uint32_t size)BaseMemory
SR_HAS_SIGNALS(CLKDevice)CLKDevice
sta_powerAHBMem
sta_power_cb(gs::gs_param_base &changed_param, gs::cnf::callback_type reason)AHBMem
sta_power_normAHBMem
start_of_simulation()AHBMem
swi_powerAHBMem
swi_power_cb(gs::gs_param_base &changed_param, gs::cnf::callback_type reason)AHBMem
transport_dbg(tlm::tlm_generic_payload &gp)AHBSlave<>virtual
transport_statistics(tlm::tlm_generic_payload &gp)AHBSlave<>virtual
write(const uint32_t &addr, const uint8_t &byte)BaseMemory
write_block(const uint32_t &addr, uint8_t *data, const uint32_t &len)BaseMemory
write_block_dbg(const uint32_t &addr, const uint8_t *data, const uint32_t &len)BaseMemory
write_dbg(const uint32_t &addr, const uint8_t &byte)BaseMemory
writeByteDBG(const uint32_t addr, const uint8_t byte)AHBMem
writesBaseMemory
writes32BaseMemory
~AHBDevice()AHBDevice< BaseModule< DefaultBase > >virtual
~AHBDeviceBase()AHBDeviceBaseinlinevirtual
~AHBMem()AHBMem
~AHBSlave()AHBSlave<>
~BaseMemory()BaseMemory
~BaseModule()BaseModule< DefaultBase >inlinevirtual
~CLKDevice()CLKDevicevirtual
~scireg_region_if()scireg_ns::scireg_region_ifinlinevirtual