Transaction-Level Modeling Framework for Space Applications
Files | |
file | apbslave.h |
file | base.h |
file | common.h |
file | msb_lsb.h |
file | msclogger.cpp |
file | msclogger.h |
file | powermonitor.cpp |
file | powermonitor.h |
file | reliabilitymanager.h |
file | sc_api.h |
file | sc_find.h |
file | socrocket.h |
file | sr_param_operator_macros.h |
file | sr_param_t.h |
file | sr_registry.cpp |
file | timingmonitor.cpp |
file | timingmonitor.h |
file | vendian.h |
file | verbose.cpp |
file | verbose.h |
Implements a unified output system for messages and debunging. | |
file | vmap.h |
file | waf.cpp |
file | waf.h |
Namespaces | |
v | |
Classes | |
class | BAR |
class | sr_register_amba_socket< BUSWIDTH, ADDR_TYPE, DATA_TYPE > |
class | APBSlaveSocket< BUSWIDTH, ADDR_TYPE, DATA_TYPE > |
class | APBSlave |
class | BaseModule< BASE > |
class | msclogger |
class | powermonitor |
class | FaultDectect_if |
struct | ReliabilityCell< WIDTH > |
class | ReliabilityManager |
struct | t_snoop |
class | sr_param_t< T > |
Template specialized base class for configuration parameters. More... | |
class | sr_register_field< T > |
class | sr_register_callback_base |
class | sr_register_callback< OWNER > |
class | sr_register< DATA_TYPE > |
class | sr_register_bank< ADDR_TYPE, DATA_TYPE > |
class | SrModuleRegistry |
class | sr_report |
class | sr_report_handler |
class | TimingMonitor |
Macros | |
#define | GC_RETURN_OK gs::cnf::return_nothing |
#define | GC_SPECIALISATIONS_DECREMENT_OPERATORS |
#define | GC_SPECIALISATIONS_INCREMENT_OPERATORS |
#define | GC_SPECIALISATIONS_ARITHMETIC_OPERATORS_ |
#define | GC_SPECIALISATIONS_BINARY_OPERATORS |
#define | SR_HAS_MODULE_GENERATOR(type, factory, isinstance) |
#define | SR_HAS_MODULE(type) |
#define | SR_INCLUDE_MODULE(type) |
#define | _GET_MACRO_(dummy, _1, NAME,...) NAME |
#define | _GET_MACRO_2_(dummy, _1, _2, NAME,...) NAME |
#define | srDebug(...) |
#define | srDebug_0() |
#define | srDebug_1(id) |
#define | srConfig(...) _GET_MACRO_(dummy,##__VA_ARGS__,srConfig_1(__VA_ARGS__),srConfig_0()) |
#define | srConfig_0() |
#define | srConfig_1(id) |
#define | srReport(...) _GET_MACRO_(dummy,##__VA_ARGS__,srReport_1(__VA_ARGS__),srReport_0()) |
#define | srReport_0() |
#define | srReport_1(id) |
#define | srAnalyse(...) |
#define | srAnalyse_0() |
#define | srAnalyse_1(id) |
#define | srInfo(...) |
#define | srInfo_0() |
#define | srInfo_1(id) |
#define | srMessage(...) _GET_MACRO_2_(dummy,##__VA_ARGS__,srMessage_2(__VA_ARGS__),srMessage_1(__VA_ARGS__)) |
#define | srMessage_1(verbosity) |
#define | srMessage_2(id, verbosity) |
#define | srWarn(...) _GET_MACRO_(dummy,##__VA_ARGS__,srWarn_1(__VA_ARGS__),srWarn_0()) |
#define | srWarn_0() |
#define | srWarn_1(id) |
#define | srError(...) _GET_MACRO_(dummy,##__VA_ARGS__,srError_1(__VA_ARGS__),srError_0()) |
#define | srError_0() |
#define | srError_1(id) |
#define | srFatal(...) _GET_MACRO_(dummy,##__VA_ARGS__,srFatal_1(__VA_ARGS__),srFatal_0()) |
#define | srFatal_0() |
#define | srFatal_1(id) |
#define | srCommand(...) _GET_MACRO_2_(dummy,##__VA_ARGS__,srCommand_2(__VA_ARGS__),srCommand_1(__VA_ARGS__)) |
#define | srCommand_1(type) |
#define | srCommand_2(id, type) |
#define | vmap std::map |
Typedefs | |
typedef amba::amba_layer_ids | AbstractionLayer |
typedef sc_core::sc_module_name | ModuleName |
typedef sc_core::sc_module | DefaultBase |
typedef gs::cnf::cnf_api | ParameterAPI |
typedef gs::cnf::gs_param_array | ParameterArray |
Enumerations | |
enum | AMBADeviceType { NONE = 0, APBIO = 1, AHBMEM = 2, AHBIO = 3 } |
enum | sr_register_callback_type { SR_PRE_READ, SR_POST_READ, SR_PRE_WRITE, SR_POST_WRITE, SR_PRE_READ, SR_POST_READ, SR_PRE_WRITE, SR_POST_WRITE } |
Functions | |
void | sr_hierarchy_push (sc_core::sc_object *obj) |
void | sr_hierarchy_pop () |
BaseModule< BASE >::BaseModule (ModuleName mn) | |
virtual | BaseModule< BASE >::~BaseModule () |
virtual void | BaseModule< BASE >::init_generics () |
virtual void | BaseModule< BASE >::init_registers () |
virtual void | BaseModule< BASE >::init_counters () |
virtual void | BaseModule< BASE >::init_power () |
void | vwait (sc_core::sc_time &delay) |
void | await (sc_core::sc_time time) |
template<uint32_t w, class T > | |
T | msb_lsb (T a) |
sc_core::sc_object * | sc_find_by_name (const char *name, sc_core::sc_object *node=0) |
void | swap_Endianess (uint64_t &datum) |
void | swap_Endianess (uint32_t &datum) |
void | swap_Endianess (uint16_t &datum) |
void | swap_Endianess (uint8_t &datum) |
boost::filesystem::path | findPath (std::string filename, std::string start) |
std::map< std::string, std::string > * | readLockFile (std::string top) |
std::map< std::string, std::string > * | getWafConfig (std::string top) |
powermonitor::powermonitor (sc_core::sc_module_name name, sc_core::sc_time m_report_time=sc_core::SC_ZERO_TIME, bool exram=false) | |
void | powermonitor::report_trigger () |
std::string | powermonitor::get_model_name (std::string ¶m) |
std::vector< std::string > | powermonitor::get_IP_params (std::vector< std::string > ¶ms) |
void | powermonitor::gen_report () |
void | powermonitor::end_of_simulation () |
ReliabilityCell< WIDTH >::ReliabilityCell () | |
void | SrModuleRegistry::included () |
SrModuleRegistry::SrModuleRegistry (std::string group, std::string type, factory_f factory, isinstance_f isinstance, std::string file) | |
static sc_core::sc_object * | SrModuleRegistry::create_object_by_name (std::string group, std::string type, std::string name) |
static bool | SrModuleRegistry::is_type (std::string group, std::string type, sc_core::sc_object *obj) |
static std::set< std::string > | SrModuleRegistry::get_module_files (std::string group) |
static std::set< std::string > | SrModuleRegistry::get_module_names (std::string group) |
static std::set< std::string > | SrModuleRegistry::get_group_names () |
static void | sr_report_handler::default_handler (const sc_core::sc_report &rep, const sc_core::sc_actions &actions) |
void | sr_report::operator() (const std::string &name="") |
static void | TimingMonitor::phase_start_timing (const unsigned int id, const char *name="") |
Create a new timing record and set starting time. More... | |
static void | TimingMonitor::phase_end_timing (const unsigned int id) |
Enter phase finishing time. More... | |
static sc_core::sc_time | TimingMonitor::phase_systime (const unsigned int id) |
Return simulation time of phase id. More... | |
static double | TimingMonitor::phase_realtime (const unsigned int id) |
Return real time for processing phase id. More... | |
static const char * | TimingMonitor::phase_get_name (const unsigned int id) |
Return name of phase id. More... | |
static void | TimingMonitor::report_timing () |
Generate timing report for all phases at 'info' level. More... | |
Variables | |
ParameterAPI * | BaseModule< BASE >::m_api |
Internal module gs param api instance. More... | |
ParameterArray | BaseModule< BASE >::m_generics |
Configuration generic container. More... | |
ParameterArray | BaseModule< BASE >::m_counters |
Performance counter container. More... | |
ParameterArray | BaseModule< BASE >::m_power |
Power counters container. More... | |
std::ofstream | msc |
sc_core::sc_time | msclogger_start |
sc_core::sc_time | msclogger_end |
std::ofstream | msc |
sc_core::sc_time | msclogger_start |
sc_core::sc_time | msclogger_end |
ReliabilityManager * | RM |
std::map< std::string, std::string > * | wafConfigMap = NULL |
static t_timing_map | TimingMonitor::timing_map |
The map for tracking phases & time. More... | |
#define _GET_MACRO_ | ( | dummy, | |
_1, | |||
NAME, | |||
... | |||
) | NAME |
#define _GET_MACRO_2_ | ( | dummy, | |
_1, | |||
_2, | |||
NAME, | |||
... | |||
) | NAME |
#define GC_RETURN_OK gs::cnf::return_nothing |
Referenced by MemoryPower::dyn_reads_cb(), MemoryPower::dyn_reads_write_cb(), MemoryPower::dyn_writes_cb(), MemoryPower::dyn_writes_write_cb(), Leon3::g_args_callback(), Leon3::g_gdb_callback(), dvectorcache::int_power_cb(), ivectorcache::int_power_cb(), localram::int_power_cb(), leon3_funclt_trap::Processor_leon3_funclt::int_power_cb(), AHBMem::int_power_cb(), Irqmp::int_power_cb(), APBCtrl::int_power_cb(), Mctrl::int_power_cb(), GPTimer::int_power_cb(), mmu::int_power_cb(), mmu_cache_base::int_power_cb(), Memory::m_reads_cb(), Memory::m_writes_cb(), sr_param_t< sc_dt::sc_uint< W > >::mirror_callback(), dvectorcache::sta_power_cb(), ivectorcache::sta_power_cb(), localram::sta_power_cb(), AHBMem::sta_power_cb(), Irqmp::sta_power_cb(), leon3_funclt_trap::Processor_leon3_funclt::sta_power_cb(), APBCtrl::sta_power_cb(), Mctrl::sta_power_cb(), GPTimer::sta_power_cb(), mmu::sta_power_cb(), mmu_cache_base::sta_power_cb(), MemoryPower::swi_power_cb(), dvectorcache::swi_power_cb(), ivectorcache::swi_power_cb(), localram::swi_power_cb(), leon3_funclt_trap::Processor_leon3_funclt::swi_power_cb(), AHBMem::swi_power_cb(), APBCtrl::swi_power_cb(), Mctrl::swi_power_cb(), mmu::swi_power_cb(), and mmu_cache_base::swi_power_cb().
#define GC_SPECIALISATIONS_ARITHMETIC_OPERATORS_ |
#define GC_SPECIALISATIONS_BINARY_OPERATORS |
#define GC_SPECIALISATIONS_DECREMENT_OPERATORS |
#define GC_SPECIALISATIONS_INCREMENT_OPERATORS |
#define SR_HAS_MODULE | ( | type | ) |
#define SR_HAS_MODULE_GENERATOR | ( | type, | |
factory, | |||
isinstance | |||
) |
#define SR_INCLUDE_MODULE | ( | type | ) |
Referenced by sc_main().
#define srAnalyse | ( | ... | ) |
Referenced by Memory::b_transport(), vectorcache::mem_read(), and vectorcache::mem_write().
#define srAnalyse_0 | ( | ) |
#define srAnalyse_1 | ( | id | ) |
#define srCommand | ( | ... | ) | _GET_MACRO_2_(dummy,##__VA_ARGS__,srCommand_2(__VA_ARGS__),srCommand_1(__VA_ARGS__)) |
Referenced by notifyIntrinsic< wordSize >::operator()().
#define srCommand_1 | ( | type | ) |
#define srCommand_2 | ( | id, | |
type | |||
) |
#define srConfig | ( | ... | ) | _GET_MACRO_(dummy,##__VA_ARGS__,srConfig_1(__VA_ARGS__),srConfig_0()) |
#define srConfig_0 | ( | ) |
#define srConfig_1 | ( | id | ) |
#define srDebug | ( | ... | ) |
Referenced by vectorcache::allocate_line(), AHBCtrl::arbitrate(), AHBCtrl::b_transport(), sr_register_bank< unsigned int, unsigned int >::bus_read(), sr_register_bank< unsigned int, unsigned int >::bus_read_dbg(), sr_register_bank< unsigned int, unsigned int >::bus_write(), sr_register_bank< unsigned int, unsigned int >::bus_write_dbg(), vectorcache::dbg_out(), mmu_cache_base::exec_data(), AHBMem::exec_func(), mmu_cache_base::exec_instr(), vectorcache::flush(), vectorcache::locate_line(), vectorcache::lrr_update(), vectorcache::lru_update(), mmu_cache_base::mem_access(), vectorcache::mem_read(), mmu_cache_base::mem_read(), vectorcache::mem_write(), mmu_cache_base::mem_write(), Irqmp::mpstat_read(), Irqmp::mpstat_write(), AHBCtrl::nb_transport_bw(), AHBCtrl::nb_transport_fw(), vectorcache::read_cache_entry(), vectorcache::read_cache_tag(), mmu_cache_base::read_ccr(), vectorcache::read_config_reg(), vectorcache::replacement_selector(), mmu_cache_base::snoopingCallBack(), vectorcache::update_line(), vectorcache::vectorcache(), vectorcache::write_cache_entry(), vectorcache::write_cache_tag(), and mmu_cache_base::write_ccr().
#define srDebug_0 | ( | ) |
#define srDebug_1 | ( | id | ) |
#define srError | ( | ... | ) | _GET_MACRO_(dummy,##__VA_ARGS__,srError_1(__VA_ARGS__),srError_0()) |
Referenced by BaseModule< DefaultBase >::BaseModule(), APBUART::before_end_of_elaboration(), mmu_cache_base::exec_data(), AHBMem::exec_func(), TcpIO::getReceivedChar(), TcpIO::makeConnection(), mmu_cache::mmu_cache(), AHBCtrl::nb_transport_bw(), AHBCtrl::nb_transport_fw(), BaseMemory::set_storage(), and vectorcache::vectorcache().
#define srError_0 | ( | ) |
#define srError_1 | ( | id | ) |
#define srFatal | ( | ... | ) | _GET_MACRO_(dummy,##__VA_ARGS__,srFatal_1(__VA_ARGS__),srFatal_0()) |
#define srFatal_0 | ( | ) |
#define srFatal_1 | ( | id | ) |
#define srInfo | ( | ... | ) |
Referenced by AHBCtrl::AHBCtrl(), AHBMem::AHBMem(), APBCtrl::APBCtrl(), sr_register_amba_socket< BUSWIDTH, unsigned int, unsigned int >::b_transport(), sr_register< unsigned int >::bus_read(), sr_register< unsigned int >::bus_write(), GPTimer::GPTimer(), Irqmp::Irqmp(), leon3_funclt_trap::Processor_leon3_funclt::mainLoop(), TcpIO::makeConnection(), Mctrl::Mctrl(), mmu_cache_base::mmu_cache_base(), sr_register< unsigned int >::operator=(), and ReportIO::sendChar().
#define srInfo_0 | ( | ) |
#define srInfo_1 | ( | id | ) |
#define srMessage | ( | ... | ) | _GET_MACRO_2_(dummy,##__VA_ARGS__,srMessage_2(__VA_ARGS__),srMessage_1(__VA_ARGS__)) |
#define srMessage_1 | ( | verbosity | ) |
#define srMessage_2 | ( | id, | |
verbosity | |||
) |
#define srReport | ( | ... | ) | _GET_MACRO_(dummy,##__VA_ARGS__,srReport_1(__VA_ARGS__),srReport_0()) |
#define srReport_0 | ( | ) |
#define srReport_1 | ( | id | ) |
#define srWarn | ( | ... | ) | _GET_MACRO_(dummy,##__VA_ARGS__,srWarn_1(__VA_ARGS__),srWarn_0()) |
#define srWarn_0 | ( | ) |
#define srWarn_1 | ( | id | ) |
#define vmap std::map |
typedef amba::amba_layer_ids AbstractionLayer |
typedef sc_core::sc_module DefaultBase |
typedef sc_core::sc_module_name ModuleName |
typedef gs::cnf::cnf_api ParameterAPI |
typedef gs::cnf::gs_param_array ParameterArray |
enum AMBADeviceType |
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Referenced by APBUART::before_end_of_elaboration(), and BaseMemory::set_storage().
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References v::pair::BOOL, v::pair::DOUBLE, v::pair::INT32, v::pair::INT64, sr_report::pairs, sr_report::set_msg(), v::pair::STRING, v::pair::TIME, v::pair::UINT32, and v::pair::UINT64.
Referenced by sc_main().
void powermonitor::end_of_simulation | ( | ) |
References powermonitor::gen_report(), and powermonitor::m_report_time.
boost::filesystem::path findPath | ( | std::string | filename, |
std::string | start | ||
) |
References usi.cci.parameter::exists, and file.
Referenced by readLockFile().
void powermonitor::gen_report | ( | ) |
References powermonitor::get_IP_params(), powermonitor::get_model_name(), i, v::info, powermonitor::m_exram, and setup::name.
Referenced by powermonitor::end_of_simulation(), and powermonitor::report_trigger().
std::vector< std::string > powermonitor::get_IP_params | ( | std::vector< std::string > & | params | ) |
References powermonitor::get_model_name().
Referenced by powermonitor::gen_report().
std::string powermonitor::get_model_name | ( | std::string & | param | ) |
References setup::name, and v::warn.
Referenced by powermonitor::gen_report(), and powermonitor::get_IP_params().
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References result.
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References result.
std::map< std::string, std::string > * getWafConfig | ( | std::string | top | ) |
References readLockFile(), and wafConfigMap.
Referenced by PythonModule::PythonModule().
void SrModuleRegistry::included | ( | ) |
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Referenced by BaseModule< DefaultBase >::BaseModule().
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Referenced by BaseModule< DefaultBase >::BaseModule().
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Reimplemented in GPTimer, Mctrl, Irqmp, and APBUART.
Referenced by BaseModule< DefaultBase >::BaseModule().
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References sr_report::actions, sr_report::enabled, and sr_report::set_msg().
Enter phase finishing time.
References v::error, TimingMonitor::t_timing_rec::rt_end, TimingMonitor::t_timing_rec::st_end, and TimingMonitor::timing_map.
Return name of phase id.
References v::error, and TimingMonitor::timing_map.
Return real time for processing phase id.
References v::error, and TimingMonitor::timing_map.
Referenced by TimingMonitor::report_timing().
Create a new timing record and set starting time.
References setup::name, TimingMonitor::t_timing_rec::name, TimingMonitor::t_timing_rec::rt_end, TimingMonitor::t_timing_rec::rt_start, TimingMonitor::t_timing_rec::st_end, TimingMonitor::t_timing_rec::st_start, and TimingMonitor::timing_map.
Return simulation time of phase id.
References v::error, and TimingMonitor::timing_map.
Referenced by TimingMonitor::report_timing().
std::map< std::string, std::string > * readLockFile | ( | std::string | top | ) |
References findPath(), flags, result, and start.
Referenced by getWafConfig().
ReliabilityCell< uint32_t >::ReliabilityCell | ( | ) |
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Generate timing report for all phases at 'info' level.
References setup::name, TimingMonitor::phase_realtime(), TimingMonitor::phase_systime(), v::report, TimingMonitor::t_timing_rec::st_end, TimingMonitor::t_timing_rec::st_start, and TimingMonitor::timing_map.
void powermonitor::report_trigger | ( | ) |
References powermonitor::gen_report(), powermonitor::m_report_time, and pysc::api::systemc::wait().
Referenced by powermonitor::powermonitor().
References i, and setup::name.
Referenced by PyScObjectGenerator::find_object_by_name().
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SrModuleRegistry::SrModuleRegistry | ( | std::string | group, |
std::string | type, | ||
SrModuleRegistry::factory_f | factory, | ||
SrModuleRegistry::isinstance_f | isinstance, | ||
std::string | file | ||
) |
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References i.
Referenced by sr_register_amba_socket< BUSWIDTH, unsigned int, unsigned int >::b_transport(), vectorcache::dbg_out(), mmu::diag_read_dctlb(), mmu::diag_read_itlb(), AHBProf::exec_func(), APBCtrl::getPNPReg(), tlb_adaptor::mem_read(), tlb_adaptor::mem_write(), vectorcache::read_cache_tag(), mmu_cache_base::read_ccr(), vectorcache::read_config_reg(), mmu::read_mcr(), mmu::read_mctpr(), mmu::read_mctxr(), mmu::read_mfar(), mmu::read_mfsr(), vectorcache::write_cache_tag(), mmu_cache_base::write_ccr(), mmu::write_mcr(), mmu::write_mctpr(), and mmu::write_mctxr().
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Internal module gs param api instance.
Referenced by BaseModule< DefaultBase >::BaseModule().
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Performance counter container.
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Configuration generic container.
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Power counters container.
std::ofstream msc |
std::ofstream msc |
sc_core::sc_time msclogger_end |
sc_core::sc_time msclogger_end |
sc_core::sc_time msclogger_start |
sc_core::sc_time msclogger_start |
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The map for tracking phases & time.
Referenced by TimingMonitor::phase_end_timing(), TimingMonitor::phase_get_name(), TimingMonitor::phase_realtime(), TimingMonitor::phase_start_timing(), TimingMonitor::phase_systime(), and TimingMonitor::report_timing().
std::map<std::string, std::string>* wafConfigMap = NULL |
Referenced by getWafConfig().