SoCRocket: core/software/grlib_tests/mmu.h File Reference

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Macros
#define	PAGE_SHIFT 12

#define	PAGE_SIZE 1<<PAGE_SHIFT

#define	PAGE_SIZE_MAX (1<<(PAGE_SHIFT+3))

#define	SRMMU_PMD_SHIFT 18

#define	SRMMU_PMD_SIZE (1UL << SRMMU_PMD_SHIFT)

#define	SRMMU_PMD_MASK (~(SRMMU_PMD_SIZE-1))

#define	SRMMU_PMD_ALIGN(addr) (((addr)+SRMMU_PMD_SIZE-1)&SRMMU_PMD_MASK)

#define	SRMMU_PGDIR_SHIFT 24

#define	SRMMU_PGDIR_SIZE (1UL << SRMMU_PGDIR_SHIFT)

#define	SRMMU_PGDIR_MASK (~(SRMMU_PGDIR_SIZE-1))

#define	SRMMU_PGDIR_ALIGN(addr) (((addr)+SRMMU_PGDIR_SIZE-1)&SRMMU_PGDIR_MASK)

#define	SRMMU_PTRS_PER_PTE 64

#define	SRMMU_PTRS_PER_PMD 64

#define	SRMMU_PTRS_PER_PGD 256

#define	SRMMU_PTRS_PER_CTX 256

#define	SRMMU_PTE_TABLE_SIZE 0x100 /* 64 entries, 4 bytes a piece */

#define	SRMMU_PMD_TABLE_SIZE 0x100 /* 64 entries, 4 bytes a piece */

#define	SRMMU_PGD_TABLE_SIZE 0x400 /* 256 entries, 4 bytes a piece */

#define	SRMMU_ET_MASK 0x3

#define	SRMMU_ET_INVALID 0x0

#define	SRMMU_ET_PTD 0x1

#define	SRMMU_ET_PTE 0x2

#define	SRMMU_ET_REPTE 0x3 /* AIEEE, SuperSparc II reverse endian page! */

#define	SRMMU_CTX_PMASK 0xfffffff0

#define	SRMMU_PTD_PMASK 0xfffffff0

#define	SRMMU_PTE_PMASK 0xffffff00

#define	SRMMU_CACHE 0x80

#define	SRMMU_DIRTY 0x40

#define	SRMMU_REF 0x20

#define	SRMMU_EXEC 0x08

#define	SRMMU_WRITE 0x04

#define	SRMMU_VALID 0x02 /* SRMMU_ET_PTE */

#define	SRMMU_PRIV 0x1c

#define	SRMMU_PRIV_RDONLY 0x18

#define	SRMMU_CHG_MASK (0xffffff00 \| SRMMU_REF \| SRMMU_DIRTY)

#define	SRMMU_PAGE_NONE

#define	SRMMU_PAGE_SHARED

#define	SRMMU_PAGE_COPY

#define	SRMMU_PAGE_RDONLY

#define	SRMMU_PAGE_KERNEL

#define	ASI_M_FLUSH_PROBE 0x18

#define	ASI_M_MMUREGS 0x19

#define	ASI_MMU_BP 0x1c

#define	SRMMU_CTRL_REG 0x00000000

#define	SRMMU_CTXTBL_PTR 0x00000100

#define	SRMMU_CTX_REG 0x00000200

#define	SRMMU_FAULT_STATUS 0x00000300

#define	SRMMU_FAULT_ADDR 0x00000400

#define	pte_val(x) (x)

#define	iopte_val(x) (x)

#define	pmd_val(x) (x)

#define	pgd_val(x) (x)

#define	ctxd_val(x) (x)

#define	pgprot_val(x) (x)

#define	iopgprot_val(x) (x)

#define	__pte(x) (x)

#define	__iopte(x) (x)

#define	__pmd(x) (x)

#define	__pgd(x) (x)

#define	__ctxd(x) (x)

#define	__pgprot(x) (x)

#define	__iopgprot(x) (x)

#define	SRMMU_NOCACHE_BITMAP_SIZE (SRMMU_NOCACHE_NPAGES * 16)

#define	SRMMU_NOCACHE_BITMAP_SHIFT (PAGE_SHIFT - 4)

#define	__nocache_pa(VADDR) VADDR

#define	__nocache_va(PADDR) PADDR

#define	__nocache_fix(VADDR) VADDR

Typedefs
typedef unsigned long	pte_t

typedef unsigned long	iopte_t

typedef unsigned long	pmd_t

typedef unsigned long	pgd_t

typedef unsigned long	ctxd_t

typedef unsigned long	pgprot_t

typedef unsigned long	iopgprot_t

Variables
int	srmmu_cache_pagetables

void *	srmmu_nocache_pool

void *	srmmu_nocache_bitmap

int	srmmu_nocache_low

int	srmmu_nocache_used

Macro Definition Documentation

#define __ctxd ( x ) (x)

#define __iopgprot ( x ) (x)

#define __iopte ( x ) (x)

#define __nocache_fix ( VADDR ) VADDR

#define __nocache_pa ( VADDR ) VADDR

#define __nocache_va ( PADDR ) PADDR

#define __pgd ( x ) (x)

#define __pgprot ( x ) (x)

#define __pmd ( x ) (x)

#define __pte ( x ) (x)

#define ASI_M_FLUSH_PROBE 0x18

#define ASI_M_MMUREGS 0x19

#define ASI_MMU_BP 0x1c

#define ctxd_val ( x ) (x)

#define iopgprot_val ( x ) (x)

#define iopte_val ( x ) (x)

#define PAGE_SHIFT 12

#define PAGE_SIZE 1<<PAGE_SHIFT

Referenced by mmu_test().

#define PAGE_SIZE_MAX (1<<(PAGE_SHIFT+3))

Referenced by mmu_test().

#define pgd_val ( x ) (x)

#define pgprot_val ( x ) (x)

#define pmd_val ( x ) (x)

#define pte_val ( x ) (x)

#define SRMMU_CACHE 0x80

Referenced by mmu_test().

#define SRMMU_CHG_MASK (0xffffff00 | SRMMU_REF | SRMMU_DIRTY)

#define SRMMU_CTRL_REG 0x00000000

#define SRMMU_CTX_PMASK 0xfffffff0

#define SRMMU_CTX_REG 0x00000200

#define SRMMU_CTXTBL_PTR 0x00000100

#define SRMMU_DIRTY 0x40

Referenced by mmu_test().

#define SRMMU_ET_INVALID 0x0

#define SRMMU_ET_MASK 0x3

#define SRMMU_ET_PTD 0x1

#define SRMMU_ET_PTE 0x2

Referenced by mmu_test().

#define SRMMU_ET_REPTE 0x3 /* AIEEE, SuperSparc II reverse endian page! */

#define SRMMU_EXEC 0x08

Referenced by mmu_test().

#define SRMMU_FAULT_ADDR 0x00000400

#define SRMMU_FAULT_STATUS 0x00000300

#define SRMMU_NOCACHE_BITMAP_SHIFT (PAGE_SHIFT - 4)

#define SRMMU_NOCACHE_BITMAP_SIZE (SRMMU_NOCACHE_NPAGES * 16)

#define SRMMU_PAGE_COPY

Value:

__pgprot(SRMMU_VALID | SRMMU_CACHE | \

SRMMU_EXEC | SRMMU_REF)

#define SRMMU_VALID

Definition: mmu.h:55

#define SRMMU_CACHE

Definition: mmu.h:50

#define SRMMU_EXEC

Definition: mmu.h:53

#define SRMMU_REF

Definition: mmu.h:52

#define __pgprot(x)

Definition: mmu.h:167

#define SRMMU_PAGE_KERNEL

Value:

__pgprot(SRMMU_VALID | SRMMU_CACHE | SRMMU_PRIV | \

SRMMU_DIRTY | SRMMU_REF)

#define SRMMU_PRIV

Definition: mmu.h:56

#define SRMMU_VALID

Definition: mmu.h:55

#define SRMMU_DIRTY

Definition: mmu.h:51

#define SRMMU_CACHE

Definition: mmu.h:50

#define SRMMU_REF

Definition: mmu.h:52

#define __pgprot(x)

Definition: mmu.h:167

#define SRMMU_PAGE_NONE

Value:

__pgprot(SRMMU_VALID | SRMMU_CACHE | \

SRMMU_PRIV | SRMMU_REF)

#define SRMMU_PRIV

Definition: mmu.h:56

#define SRMMU_VALID

Definition: mmu.h:55

#define SRMMU_CACHE

Definition: mmu.h:50

#define SRMMU_REF

Definition: mmu.h:52

#define __pgprot(x)

Definition: mmu.h:167

#define SRMMU_PAGE_RDONLY

Value:

__pgprot(SRMMU_VALID | SRMMU_CACHE | \

SRMMU_EXEC | SRMMU_REF)

#define SRMMU_VALID

Definition: mmu.h:55

#define SRMMU_CACHE

Definition: mmu.h:50

#define SRMMU_EXEC

Definition: mmu.h:53

#define SRMMU_REF

Definition: mmu.h:52

#define __pgprot(x)

Definition: mmu.h:167

#define SRMMU_PAGE_SHARED

Value:

__pgprot(SRMMU_VALID | SRMMU_CACHE | \

SRMMU_EXEC | SRMMU_WRITE | SRMMU_REF)

#define SRMMU_WRITE

Definition: mmu.h:54

#define SRMMU_VALID

Definition: mmu.h:55

#define SRMMU_CACHE

Definition: mmu.h:50

#define SRMMU_EXEC

Definition: mmu.h:53

#define SRMMU_REF

Definition: mmu.h:52

#define __pgprot(x)

Definition: mmu.h:167

#define SRMMU_PGD_TABLE_SIZE 0x400 /* 256 entries, 4 bytes a piece */

Referenced by mmu_test().

#define SRMMU_PGDIR_ALIGN ( addr ) (((addr)+SRMMU_PGDIR_SIZE-1)&SRMMU_PGDIR_MASK)

#define SRMMU_PGDIR_MASK (~(SRMMU_PGDIR_SIZE-1))

#define SRMMU_PGDIR_SHIFT 24

#define SRMMU_PGDIR_SIZE (1UL << SRMMU_PGDIR_SHIFT)

#define SRMMU_PMD_ALIGN ( addr ) (((addr)+SRMMU_PMD_SIZE-1)&SRMMU_PMD_MASK)

#define SRMMU_PMD_MASK (~(SRMMU_PMD_SIZE-1))

#define SRMMU_PMD_SHIFT 18

#define SRMMU_PMD_SIZE (1UL << SRMMU_PMD_SHIFT)

#define SRMMU_PMD_TABLE_SIZE 0x100 /* 64 entries, 4 bytes a piece */

Referenced by mmu_test().

#define SRMMU_PRIV 0x1c

Referenced by mmu_test().

#define SRMMU_PRIV_RDONLY 0x18

Referenced by mmu_test().

#define SRMMU_PTD_PMASK 0xfffffff0

#define SRMMU_PTE_PMASK 0xffffff00

#define SRMMU_PTE_TABLE_SIZE 0x100 /* 64 entries, 4 bytes a piece */

Referenced by mmu_test().

#define SRMMU_PTRS_PER_CTX 256

Referenced by mmu_test().

#define SRMMU_PTRS_PER_PGD 256

#define SRMMU_PTRS_PER_PMD 64

#define SRMMU_PTRS_PER_PTE 64

#define SRMMU_REF 0x20

Referenced by mmu_test().

#define SRMMU_VALID 0x02 /* SRMMU_ET_PTE */

#define SRMMU_WRITE 0x04

Referenced by mmu_test().

Typedef Documentation

typedef unsigned long ctxd_t

typedef unsigned long iopgprot_t

typedef unsigned long iopte_t

typedef unsigned long pgd_t

typedef unsigned long pgprot_t

typedef unsigned long pmd_t

typedef unsigned long pte_t

Variable Documentation

int srmmu_cache_pagetables

void* srmmu_nocache_bitmap

int srmmu_nocache_low

void* srmmu_nocache_pool

int srmmu_nocache_used