| ahb | AHBSlave<> | |
| AHBDevice(ModuleName mn, uint32_t hindex, uint8_t vendorid, uint16_t deviceid, uint8_t version, uint8_t irq, BAR bar0, BAR bar1=BAR(), BAR bar2=BAR(), BAR bar3=BAR()) | AHBDevice< BaseModule< DefaultBase > > | |
| AHBDevice(ModuleName mn) | AHBDevice< BaseModule< DefaultBase > > | |
| AHBMem(const ModuleName nm, uint16_t haddr_=0, uint16_t hmask_=0, AbstractionLayer ambaLayer=amba::amba_LT, uint32_t slave_id=0, bool cacheable=1, uint32_t wait_states=0, bool pow_mon=false) | AHBMem | |
| AHBSlave(ModuleName mn, uint8_t hindex, uint8_t vendor, uint8_t device, uint8_t version, uint8_t irq, AbstractionLayer ambaLayer, BAR bar0=BAR(), BAR bar1=BAR(), BAR bar2=BAR(), BAR bar3=BAR()) | AHBSlave<> | |
| b_transport(tlm::tlm_generic_payload &gp, sc_time &delay) | AHBSlave<> | virtual |
| BaseMemory() | BaseMemory | |
| BaseModule(ModuleName mn) | BaseModule< DefaultBase > | inline |
| before_end_of_elaboration() | AHBMem | |
| clear_mem() | AHBMem | inline |
| clk | CLKDevice | |
| clkcng() | CLKDevice | inlinevirtual |
| CLKDevice() | CLKDevice | |
| clock_cycle | CLKDevice | protected |
| dorst() | AHBMem | virtual |
| dyn_read_energy | AHBMem | |
| dyn_read_energy_norm | AHBMem | |
| dyn_reads | AHBMem | |
| dyn_write_energy | AHBMem | |
| dyn_write_energy_norm | AHBMem | |
| dyn_writes | AHBMem | |
| end_of_simulation() | AHBMem | |
| erase(const uint32_t &start, const uint32_t &end) | BaseMemory | |
| erase_dbg(const uint32_t &start, const uint32_t &end) | BaseMemory | |
| exec_func(tlm::tlm_generic_payload &gp, sc_time &delay, bool debug=false) | AHBMem | virtual |
| g_bar0 | AHBDevice< BaseModule< DefaultBase > > | protected |
| g_bar0haddr | AHBDevice< BaseModule< DefaultBase > > | protected |
| g_bar0hcacheable | AHBDevice< BaseModule< DefaultBase > > | protected |
| g_bar0hmask | AHBDevice< BaseModule< DefaultBase > > | protected |
| g_bar0hprefetchable | AHBDevice< BaseModule< DefaultBase > > | protected |
| g_bar0htype | AHBDevice< BaseModule< DefaultBase > > | protected |
| g_bar1 | AHBDevice< BaseModule< DefaultBase > > | protected |
| g_bar1haddr | AHBDevice< BaseModule< DefaultBase > > | protected |
| g_bar1hcacheable | AHBDevice< BaseModule< DefaultBase > > | protected |
| g_bar1hmask | AHBDevice< BaseModule< DefaultBase > > | protected |
| g_bar1hprefetchable | AHBDevice< BaseModule< DefaultBase > > | protected |
| g_bar1htype | AHBDevice< BaseModule< DefaultBase > > | protected |
| g_bar2 | AHBDevice< BaseModule< DefaultBase > > | protected |
| g_bar2haddr | AHBDevice< BaseModule< DefaultBase > > | protected |
| g_bar2hcacheable | AHBDevice< BaseModule< DefaultBase > > | protected |
| g_bar2hmask | AHBDevice< BaseModule< DefaultBase > > | protected |
| g_bar2hprefetchable | AHBDevice< BaseModule< DefaultBase > > | protected |
| g_bar2htype | AHBDevice< BaseModule< DefaultBase > > | protected |
| g_bar3 | AHBDevice< BaseModule< DefaultBase > > | protected |
| g_bar3haddr | AHBDevice< BaseModule< DefaultBase > > | protected |
| g_bar3hcacheable | AHBDevice< BaseModule< DefaultBase > > | protected |
| g_bar3hmask | AHBDevice< BaseModule< DefaultBase > > | protected |
| g_bar3hprefetchable | AHBDevice< BaseModule< DefaultBase > > | protected |
| g_bar3htype | AHBDevice< BaseModule< DefaultBase > > | protected |
| g_bars | AHBDevice< BaseModule< DefaultBase > > | protected |
| g_hdeviceid | AHBDevice< BaseModule< DefaultBase > > | protected |
| g_hindex | AHBDevice< BaseModule< DefaultBase > > | protected |
| g_hirq | AHBDevice< BaseModule< DefaultBase > > | protected |
| g_hvendorid | AHBDevice< BaseModule< DefaultBase > > | protected |
| g_hversion | AHBDevice< BaseModule< DefaultBase > > | protected |
| GC_HAS_CALLBACKS() | AHBMem | |
| get_ahb_bar_addr(uint32_t bar) const | AHBDevice< BaseModule< DefaultBase > > | virtual |
| get_ahb_bar_base(uint32_t bar) const | AHBDevice< BaseModule< DefaultBase > > | virtual |
| get_ahb_bar_cachable(uint32_t bar) const | AHBDevice< BaseModule< DefaultBase > > | inline |
| get_ahb_bar_mask(uint32_t bar) const | AHBDevice< BaseModule< DefaultBase > > | virtual |
| get_ahb_bar_prefetchable(uint32_t bar) const | AHBDevice< BaseModule< DefaultBase > > | inline |
| get_ahb_bar_relative_addr(uint32_t bar, uint32_t addr) const | AHBDevice< BaseModule< DefaultBase > > | virtual |
| get_ahb_bar_size(uint32_t bar) const | AHBDevice< BaseModule< DefaultBase > > | virtual |
| get_ahb_bar_type(uint32_t bar) const | AHBDevice< BaseModule< DefaultBase > > | virtual |
| get_ahb_base_addr() | AHBDevice< BaseModule< DefaultBase > > | virtual |
| get_ahb_base_addr_() const | AHBDevice< BaseModule< DefaultBase > > | virtual |
| get_ahb_device_id() const | AHBDevice< BaseModule< DefaultBase > > | virtual |
| get_ahb_device_info() | AHBDevice< BaseModule< DefaultBase > > | virtual |
| get_ahb_hindex() const | AHBDevice< BaseModule< DefaultBase > > | virtual |
| get_ahb_size() | AHBDevice< BaseModule< DefaultBase > > | virtual |
| get_ahb_size_() const | AHBDevice< BaseModule< DefaultBase > > | virtual |
| get_ahb_vendor_id() const | AHBDevice< BaseModule< DefaultBase > > | virtual |
| get_clock() | AHBMem | virtual |
| get_direct_mem_ptr(tlm::tlm_generic_payload &trans, tlm::tlm_dmi &dmi_data) | AHBMem | |
| init(uint32_t hindex, uint8_t vendorid, uint16_t deviceid, uint8_t version, uint8_t irq, BAR bar0, BAR bar1=BAR(), BAR bar2=BAR(), BAR bar3=BAR()) | AHBDevice< BaseModule< DefaultBase > > | |
| init_ahb_generics() | AHBDevice< BaseModule< DefaultBase > > | |
| init_counters() | BaseModule< DefaultBase > | inlinevirtual |
| init_generics() | AHBMem | virtual |
| init_power() | BaseModule< DefaultBase > | inlinevirtual |
| init_registers() | BaseModule< DefaultBase > | inlinevirtual |
| int_power | AHBMem | |
| int_power_cb(gs::gs_param_base &changed_param, gs::cnf::callback_type reason) | AHBMem | |
| int_power_norm | AHBMem | |
| m_api | BaseModule< DefaultBase > | protected |
| m_counters | BaseModule< DefaultBase > | protected |
| m_generics | BaseModule< DefaultBase > | protected |
| m_power | BaseModule< DefaultBase > | protected |
| m_reads | AHBSlave<> | protected |
| m_register | AHBDevice< BaseModule< DefaultBase > > | protected |
| m_RequestPEQ | AHBSlave<> | |
| m_ResponsePEQ | AHBSlave<> | |
| m_storage | BaseMemory | protected |
| m_writes | AHBSlave<> | protected |
| nb_transport_fw(tlm::tlm_generic_payload &trans, tlm::tlm_phase &phase, sc_core::sc_time &delay) | AHBSlave<> | virtual |
| onclk(const sc_core::sc_time &value, const sc_core::sc_time &time) | CLKDevice | virtual |
| onrst(const bool &value, const sc_core::sc_time &time) | CLKDevice | virtual |
| power | AHBMem | |
| power_frame_starting_time | AHBMem | |
| power_model() | AHBMem | |
| print_ahb_device_info(char *name) const | AHBDevice< BaseModule< DefaultBase > > | virtual |
| print_transport_statistics(const char *name) const | AHBSlave<> | virtual |
| read(const uint32_t &addr) | BaseMemory | |
| read_block(const uint32_t &addr, uint8_t *data, const uint32_t &len) | BaseMemory | |
| read_block_dbg(const uint32_t &addr, uint8_t *data, const uint32_t &len) const | BaseMemory | |
| read_dbg(const uint32_t &addr) | BaseMemory | |
| reads | BaseMemory | |
| reads32 | BaseMemory | |
| requestThread() | AHBSlave<> | |
| responseThread() | AHBSlave<> | |
| rst | CLKDevice | |
| SC_HAS_PROCESS(AHBMem) | AHBMem | |
| AHBSlave<>::SC_HAS_PROCESS(AHBSlave) | AHBSlave<> | |
| scireg_add_callback(scireg_callback &cb) | scireg_ns::scireg_region_if | inlinevirtual |
| scireg_get_bit_attributes(vector_byte &v, scireg_bit_attributes_type t, sc_dt::uint64 size, sc_dt::uint64 offset=0) const | scireg_ns::scireg_region_if | inlinevirtual |
| scireg_get_bit_width() const | BaseMemory | inlinevirtual |
| scireg_get_byte_width() const | scireg_ns::scireg_region_if | inlinevirtual |
| scireg_get_child_regions(std::vector< scireg_mapped_region > &mapped_regions, sc_dt::uint64 size=sc_dt::uint64(-1), sc_dt::uint64 offset=0) const | scireg_ns::scireg_region_if | inlinevirtual |
| scireg_get_dmi_granted(bool &granted, sc_dt::uint64 size, sc_dt::uint64 offset=0) const | BaseMemory | inlinevirtual |
| scireg_get_high_pos() const | BaseMemory | inlinevirtual |
| scireg_get_low_pos() const | BaseMemory | inlinevirtual |
| scireg_get_parent_modules(std::vector< sc_core::sc_module * > &v) const | scireg_ns::scireg_region_if | inlinevirtual |
| scireg_get_parent_regions(std::vector< scireg_region_if * > &v) const | scireg_ns::scireg_region_if | inlinevirtual |
| scireg_get_region_type(scireg_ns::scireg_region_type &t) const | BaseMemory | inlinevirtual |
| scireg_get_string_attribute(const char *&s, scireg_string_attribute_type t) const | scireg_ns::scireg_region_if | inlinevirtual |
| scireg_get_target_sockets(std::vector< sc_core::sc_object * > &v) const | scireg_ns::scireg_region_if | inlinevirtual |
| scireg_get_value_info(std::vector< scireg_value_info > &v) const | scireg_ns::scireg_region_if | inlinevirtual |
| scireg_read(scireg_ns::vector_byte &v, sc_dt::uint64 size, sc_dt::uint64 offset=0) const | BaseMemory | inlinevirtual |
| scireg_region_if() | scireg_ns::scireg_region_if | inline |
| scireg_remove_callback(scireg_callback &cb) | scireg_ns::scireg_region_if | inlinevirtual |
| scireg_write(const scireg_ns::vector_byte &v, sc_dt::uint64 size, sc_dt::uint64 offset=0) | BaseMemory | inlinevirtual |
| set_clk(sc_core::sc_clock &clk) | CLKDevice | |
| set_clk(sc_core::sc_time period) | CLKDevice | |
| set_clk(double period, sc_core::sc_time_unit base) | CLKDevice | |
| set_storage(std::string implementation, uint32_t size) | BaseMemory | |
| SR_HAS_SIGNALS(CLKDevice) | CLKDevice | |
| sta_power | AHBMem | |
| sta_power_cb(gs::gs_param_base &changed_param, gs::cnf::callback_type reason) | AHBMem | |
| sta_power_norm | AHBMem | |
| start_of_simulation() | AHBMem | |
| swi_power | AHBMem | |
| swi_power_cb(gs::gs_param_base &changed_param, gs::cnf::callback_type reason) | AHBMem | |
| transport_dbg(tlm::tlm_generic_payload &gp) | AHBSlave<> | virtual |
| transport_statistics(tlm::tlm_generic_payload &gp) | AHBSlave<> | virtual |
| write(const uint32_t &addr, const uint8_t &byte) | BaseMemory | |
| write_block(const uint32_t &addr, uint8_t *data, const uint32_t &len) | BaseMemory | |
| write_block_dbg(const uint32_t &addr, const uint8_t *data, const uint32_t &len) | BaseMemory | |
| write_dbg(const uint32_t &addr, const uint8_t &byte) | BaseMemory | |
| writeByteDBG(const uint32_t addr, const uint8_t byte) | AHBMem | |
| writes | BaseMemory | |
| writes32 | BaseMemory | |
| ~AHBDevice() | AHBDevice< BaseModule< DefaultBase > > | virtual |
| ~AHBDeviceBase() | AHBDeviceBase | inlinevirtual |
| ~AHBMem() | AHBMem | |
| ~AHBSlave() | AHBSlave<> | |
| ~BaseMemory() | BaseMemory | |
| ~BaseModule() | BaseModule< DefaultBase > | inlinevirtual |
| ~CLKDevice() | CLKDevice | virtual |
| ~scireg_region_if() | scireg_ns::scireg_region_if | inlinevirtual |