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Transaction-Level Modeling Framework for Space Applications

Mctrl Member List

This is the complete list of members for Mctrl, including all inherited members.

ahbAHBSlave< APBSlave >
AHBDevice(ModuleName mn, uint32_t hindex, uint8_t vendorid, uint16_t deviceid, uint8_t version, uint8_t irq, BAR bar0, BAR bar1=BAR(), BAR bar2=BAR(), BAR bar3=BAR())AHBDevice< APBSlave >
AHBDevice(ModuleName mn)AHBDevice< APBSlave >
AHBSlave(ModuleName mn, uint8_t hindex, uint8_t vendor, uint8_t device, uint8_t version, uint8_t irq, AbstractionLayer ambaLayer, BAR bar0=BAR(), BAR bar1=BAR(), BAR bar2=BAR(), BAR bar3=BAR())AHBSlave< APBSlave >
apbAPBSlave
APBDevice(ModuleName mn, uint32_t bus_id, uint8_t vendorid, uint16_t deviceid, uint8_t version, uint8_t irq, AMBADeviceType type, uint16_t mask, bool cacheable, bool prefetchable, uint16_t address)APBDevice< BaseModule< DefaultBase > >
APBDevice(ModuleName mn)APBDevice< BaseModule< DefaultBase > >
APBSlave(ModuleName mn, uint32_t bus_id, uint8_t vendorid, uint16_t deviceid, uint8_t version, uint8_t irq, AMBADeviceType type, uint16_t mask, bool cacheable, bool prefetchable, uint16_t address)APBSlaveinline
APBSlave(ModuleName mn)APBSlaveinline
b_transport(tlm::tlm_generic_payload &gp, sc_time &delay)AHBSlave< APBSlave >virtual
BaseModule(ModuleName mn)BaseModule< DefaultBase >inline
clkCLKDevice
clkcng()CLKDeviceinlinevirtual
CLKDevice()CLKDevice
clock_cycleCLKDeviceprotected
dorst()Mctrlvirtual
end_of_elaboration()Mctrl
end_of_simulation()Mctrl
exec_func(tlm::tlm_generic_payload &trans, sc_core::sc_time &delay, bool debug=false)Mctrl
AHBSlave< APBSlave >::exec_func(tlm::tlm_generic_payload &gp, sc_time &delay, bool debug=false)=0AHBSlave< APBSlave >pure virtual
g_bar0AHBDevice< APBSlave >protected
g_bar0haddrAHBDevice< APBSlave >protected
g_bar0hcacheableAHBDevice< APBSlave >protected
g_bar0hmaskAHBDevice< APBSlave >protected
g_bar0hprefetchableAHBDevice< APBSlave >protected
g_bar0htypeAHBDevice< APBSlave >protected
g_bar1AHBDevice< APBSlave >protected
g_bar1haddrAHBDevice< APBSlave >protected
g_bar1hcacheableAHBDevice< APBSlave >protected
g_bar1hmaskAHBDevice< APBSlave >protected
g_bar1hprefetchableAHBDevice< APBSlave >protected
g_bar1htypeAHBDevice< APBSlave >protected
g_bar2AHBDevice< APBSlave >protected
g_bar2haddrAHBDevice< APBSlave >protected
g_bar2hcacheableAHBDevice< APBSlave >protected
g_bar2hmaskAHBDevice< APBSlave >protected
g_bar2hprefetchableAHBDevice< APBSlave >protected
g_bar2htypeAHBDevice< APBSlave >protected
g_bar3AHBDevice< APBSlave >protected
g_bar3haddrAHBDevice< APBSlave >protected
g_bar3hcacheableAHBDevice< APBSlave >protected
g_bar3hmaskAHBDevice< APBSlave >protected
g_bar3hprefetchableAHBDevice< APBSlave >protected
g_bar3htypeAHBDevice< APBSlave >protected
g_barsAHBDevice< APBSlave >protected
g_hdeviceidAHBDevice< APBSlave >protected
g_hindexAHBDevice< APBSlave >protected
g_hirqAHBDevice< APBSlave >protected
g_hvendoridAHBDevice< APBSlave >protected
g_hversionAHBDevice< APBSlave >protected
g_paddrAPBDevice< BaseModule< DefaultBase > >protected
g_pcacheableAPBDevice< BaseModule< DefaultBase > >protected
g_pdeviceidAPBDevice< BaseModule< DefaultBase > >protected
g_pindexAPBDevice< BaseModule< DefaultBase > >protected
g_pirqAPBDevice< BaseModule< DefaultBase > >protected
g_pmaskAPBDevice< BaseModule< DefaultBase > >protected
g_pprefetchableAPBDevice< BaseModule< DefaultBase > >protected
g_ptypeAPBDevice< BaseModule< DefaultBase > >protected
g_pvendoridAPBDevice< BaseModule< DefaultBase > >protected
g_pversionAPBDevice< BaseModule< DefaultBase > >protected
GC_HAS_CALLBACKS()Mctrl
get_ahb_bar_addr(uint32_t bar) constAHBDevice< APBSlave >virtual
get_ahb_bar_base(uint32_t bar) constAHBDevice< APBSlave >virtual
get_ahb_bar_cachable(uint32_t bar) constAHBDevice< APBSlave >inline
get_ahb_bar_mask(uint32_t bar) constAHBDevice< APBSlave >virtual
get_ahb_bar_prefetchable(uint32_t bar) constAHBDevice< APBSlave >inline
get_ahb_bar_relative_addr(uint32_t bar, uint32_t addr) constAHBDevice< APBSlave >virtual
get_ahb_bar_size(uint32_t bar) constAHBDevice< APBSlave >virtual
get_ahb_bar_type(uint32_t bar) constAHBDevice< APBSlave >virtual
get_ahb_base_addr()AHBDevice< APBSlave >virtual
get_ahb_base_addr_() constAHBDevice< APBSlave >virtual
get_ahb_device_id() constAHBDevice< APBSlave >virtual
get_ahb_device_info()AHBDevice< APBSlave >virtual
get_ahb_hindex() constAHBDevice< APBSlave >virtual
get_ahb_size()AHBDevice< APBSlave >virtual
get_ahb_size_() constAHBDevice< APBSlave >virtual
get_ahb_vendor_id() constAHBDevice< APBSlave >virtual
get_apb_base() constAPBDevice< BaseModule< DefaultBase > >virtual
get_apb_base_addr()APBDevice< BaseModule< DefaultBase > >virtual
get_apb_base_addr_() constAPBDevice< BaseModule< DefaultBase > >virtual
get_apb_device_id() constAPBDevice< BaseModule< DefaultBase > >virtual
get_apb_device_info()APBDevice< BaseModule< DefaultBase > >virtual
get_apb_mask() constAPBDevice< BaseModule< DefaultBase > >virtual
get_apb_pindex() constAPBDevice< BaseModule< DefaultBase > >virtual
get_apb_relative_addr(uint32_t addr) constAPBDevice< BaseModule< DefaultBase > >virtual
get_apb_size()APBDevice< BaseModule< DefaultBase > >virtual
get_apb_size_() constAPBDevice< BaseModule< DefaultBase > >virtual
get_apb_type() constAPBDevice< BaseModule< DefaultBase > >virtual
get_apb_vendor_id() constAPBDevice< BaseModule< DefaultBase > >virtual
get_clock()Mctrlvirtual
get_direct_mem_ptr(tlm::tlm_generic_payload &trans, tlm::tlm_dmi &dmi_data)Mctrl
init(uint32_t hindex, uint8_t vendorid, uint16_t deviceid, uint8_t version, uint8_t irq, BAR bar0, BAR bar1=BAR(), BAR bar2=BAR(), BAR bar3=BAR())AHBDevice< APBSlave >
init_ahb_generics()AHBDevice< APBSlave >
init_apb(uint32_t pindex, uint8_t vendorid, uint16_t deviceid, uint8_t version, uint8_t irq, AMBADeviceType type, uint16_t mask, bool cacheable, bool prefetchable, uint16_t address)APBDevice< BaseModule< DefaultBase > >
init_apb_generics()APBDevice< BaseModule< DefaultBase > >
init_counters()BaseModule< DefaultBase >inlinevirtual
init_generics()Mctrlvirtual
init_power()BaseModule< DefaultBase >inlinevirtual
init_registers()Mctrlvirtual
int_power_cb(gs::gs_param_base &changed_param, gs::cnf::callback_type reason)Mctrl
invalidate_direct_mem_ptr(unsigned int index, sc_dt::uint64 start_range, sc_dt::uint64 end_range)Mctrl
launch_sdram_command()Mctrl
m_apiBaseModule< DefaultBase >protected
m_countersBaseModule< DefaultBase >protected
m_genericsBaseModule< DefaultBase >protected
m_powerBaseModule< DefaultBase >protected
m_readsAHBSlave< APBSlave >protected
m_registerAHBDevice< APBSlave >protected
m_RequestPEQAHBSlave< APBSlave >
m_ResponsePEQAHBSlave< APBSlave >
m_writesAHBSlave< APBSlave >protected
MCFG1Mctrlstatic
MCFG1_BEXCNMctrlstatic
MCFG1_BEXCN_DEFAULTMctrlstatic
MCFG1_DEFAULTMctrlstatic
MCFG1_IBRDYMctrlstatic
MCFG1_IBRDY_DEFAULTMctrlstatic
MCFG1_IO_WAITSTATESMctrlstatic
MCFG1_IO_WAITSTATES_DEFAULTMctrlstatic
MCFG1_IO_WIDTHMctrlstatic
MCFG1_IOBUSWMctrlstatic
MCFG1_IOBUSW_DEFAULTMctrlstatic
MCFG1_IOENMctrlstatic
MCFG1_IOEN_DEFAULTMctrlstatic
MCFG1_PROM_READ_WSMctrlstatic
MCFG1_PROM_READ_WS_DEFAULTMctrlstatic
MCFG1_PROM_WIDTHMctrlstatic
MCFG1_PROM_WIDTH_DEFAULTMctrlstatic
MCFG1_PROM_WRITE_WSMctrlstatic
MCFG1_PROM_WRITE_WS_DEFAULTMctrlstatic
MCFG1_PWENMctrlstatic
MCFG1_PWEN_DEFAULTMctrlstatic
mcfg1_write()Mctrl
MCFG1_WRITE_MASKMctrlstatic
MCFG2Mctrlstatic
MCFG2_D64Mctrlstatic
MCFG2_D64_DEFAULTMctrlstatic
MCFG2_DEFAULTMctrlstatic
MCFG2_MSMctrlstatic
MCFG2_MS_DEFAULTMctrlstatic
MCFG2_RAM_BANK_SIZEMctrlstatic
MCFG2_RAM_BANK_SIZE_DEFAULTMctrlstatic
MCFG2_RAM_READ_WSMctrlstatic
MCFG2_RAM_READ_WS_DEFAULTMctrlstatic
MCFG2_RAM_WIDTHMctrlstatic
MCFG2_RAM_WIDTH_DEFAULTMctrlstatic
MCFG2_RAM_WRITE_WSMctrlstatic
MCFG2_RAM_WRITE_WS_DEFAULTMctrlstatic
MCFG2_RBRDYMctrlstatic
MCFG2_RBRDY_DEFAULTMctrlstatic
MCFG2_RMWMctrlstatic
MCFG2_RMW_DEFAULTMctrlstatic
MCFG2_SDRAM_BANKSZMctrlstatic
MCFG2_SDRAM_BANKSZ_DEFAULTMctrlstatic
MCFG2_SDRAM_CMDMctrlstatic
MCFG2_SDRAM_CMD_DEFAULTMctrlstatic
MCFG2_SDRAM_COSZMctrlstatic
MCFG2_SDRAM_COSZ_DEFAULTMctrlstatic
MCFG2_SDRAM_TRFCMctrlstatic
MCFG2_SDRAM_TRFC_DEFAULTMctrlstatic
MCFG2_SDRFMctrlstatic
MCFG2_SDRF_DEFAULTMctrlstatic
MCFG2_SEMctrlstatic
MCFG2_SE_DEFAULTMctrlstatic
MCFG2_SIMctrlstatic
MCFG2_SI_DEFAULTMctrlstatic
MCFG2_TCASMctrlstatic
MCFG2_TCAS_DEFAULTMctrlstatic
MCFG2_TRPMctrlstatic
MCFG2_TRP_DEFAULTMctrlstatic
mcfg2_write()Mctrl
MCFG2_WRITE_MASKMctrlstatic
MCFG3Mctrlstatic
MCFG3_DEFAULTMctrlstatic
MCFG3_SDRAM_RLD_VALMctrlstatic
MCFG3_WRITE_MASKMctrlstatic
MCFG4Mctrlstatic
MCFG4_CEMctrlstatic
MCFG4_CE_DEFAULTMctrlstatic
MCFG4_DCMctrlstatic
MCFG4_DEFAULTMctrlstatic
MCFG4_DS_DEFAULTMctrlstatic
MCFG4_EMMctrlstatic
MCFG4_EM_DEFAULTMctrlstatic
MCFG4_MEMctrlstatic
MCFG4_ME_DEFAULTMctrlstatic
MCFG4_PASRMctrlstatic
MCFG4_PASR_DEFAULTMctrlstatic
MCFG4_PMODEMctrlstatic
MCFG4_PMODE_DEFAULTMctrlstatic
MCFG4_TCSRMctrlstatic
MCFG4_TCSR_DEFAULTMctrlstatic
MCFG4_TXSRMctrlstatic
MCFG4_TXSR_DEFAULTMctrlstatic
MCFG4_WRITE_MASKMctrlstatic
Mctrl(sc_module_name name, int romasel=28, int sdrasel=29, int romaddr=0x0, int rommask=0xE00, int ioaddr=0x200, int iomask=0xE00, int ramaddr=0x400, int rammask=0xC00, int paddr=0x0, int pmask=0xFFF, int wprot=0, int srbanks=4, int ram8=0, int ram16=0, int sepbus=0, int sdbits=32, int mobile=0, int sden=0, unsigned int hindex=0, unsigned int pindex=0, bool powmon=false, AbstractionLayer ambaLayer=amba::amba_LT)Mctrl
memMctrl
nb_transport_fw(tlm::tlm_generic_payload &trans, tlm::tlm_phase &phase, sc_core::sc_time &delay)AHBSlave< APBSlave >virtual
onclk(const sc_core::sc_time &value, const sc_core::sc_time &time)CLKDevicevirtual
onrst(const bool &value, const sc_core::sc_time &time)CLKDevicevirtual
power_model()Mctrl
print_ahb_device_info(char *name) constAHBDevice< APBSlave >virtual
print_apb_device_info(char *name) constAPBDevice< BaseModule< DefaultBase > >virtual
print_transport_statistics(const char *name) constAHBSlave< APBSlave >virtual
rAPBSlave
requestThread()AHBSlave< APBSlave >
responseThread()AHBSlave< APBSlave >
rstCLKDevice
SC_HAS_PROCESS(Mctrl)Mctrl
AHBSlave< APBSlave >::SC_HAS_PROCESS(AHBSlave)AHBSlave< APBSlave >
set_clk(sc_core::sc_clock &clk)CLKDevice
set_clk(sc_core::sc_time period)CLKDevice
set_clk(double period, sc_core::sc_time_unit base)CLKDevice
SR_HAS_SIGNALS(Mctrl)Mctrl
CLKDevice::SR_HAS_SIGNALS(CLKDevice)CLKDevice
sta_power_cb(gs::gs_param_base &changed_param, gs::cnf::callback_type reason)Mctrl
start_of_simulation()Mctrl
swi_power_cb(gs::gs_param_base &changed_param, gs::cnf::callback_type reason)Mctrl
switch_power_mode()Mctrl
transport_dbg(tlm_generic_payload &gp)Mctrl
AHBSlave< APBSlave >::transport_dbg(tlm::tlm_generic_payload &gp)AHBSlave< APBSlave >virtual
transport_statistics(tlm::tlm_generic_payload &gp)AHBSlave< APBSlave >virtual
~AHBDevice()AHBDevice< APBSlave >virtual
~AHBDeviceBase()AHBDeviceBaseinlinevirtual
~AHBSlave()AHBSlave< APBSlave >
~APBDevice()APBDevice< BaseModule< DefaultBase > >virtual
~APBDeviceBase()APBDeviceBaseinlinevirtual
~APBSlave()APBSlaveinline
~BaseModule()BaseModule< DefaultBase >inlinevirtual
~CLKDevice()CLKDevicevirtual
~Mctrl()Mctrl