Transaction-Level Modeling Framework for Space Applications
This is the complete list of members for ivectorcache, including all inherited members.
allocate_line(unsigned const tag, unsigned const idx, unsigned const offset, unsigned const len, unsigned char *const data, sc_core::sc_time *delay, unsigned *debug, bool &cacheable, bool is_dbg) | vectorcache | protected |
bypassops | vectorcache | protected |
CACHE_CONFIG_REG | vectorcache | protected |
cache_mem | vectorcache | protected |
check_mode() | ivectorcache | virtual |
clkcng(sc_core::sc_time &clk) | vectorcache | virtual |
clockcycle | vectorcache | protected |
dbg_out(unsigned int line) | vectorcache | virtual |
dcache enum value | cache_if | |
dyn_data_read_energy | ivectorcache | |
dyn_data_reads | vectorcache | protected |
dyn_data_write_energy | ivectorcache | |
dyn_data_writes | vectorcache | protected |
dyn_idata_read_energy_norm | ivectorcache | |
dyn_idata_write_energy_norm | ivectorcache | |
dyn_itag_read_energy_norm | ivectorcache | |
dyn_itag_write_energy_norm | ivectorcache | |
dyn_tag_read_energy | ivectorcache | |
dyn_tag_reads | vectorcache | protected |
dyn_tag_write_energy | ivectorcache | |
dyn_tag_writes | vectorcache | protected |
end_of_simulation() | vectorcache | |
flush(sc_core::sc_time *t, unsigned int *debug, bool is_dbg) | vectorcache | virtual |
GC_HAS_CALLBACKS() | ivectorcache | |
get_address(unsigned tag, unsigned idx, unsigned offset) | vectorcache | inlineprotected |
get_cache_type() | ivectorcache | virtual |
get_idx(unsigned address) | vectorcache | inlineprotected |
get_offset(unsigned address) | vectorcache | inlineprotected |
get_tag(unsigned address) | vectorcache | inlineprotected |
icache enum value | cache_if | |
idata | ivectorcache | |
int_idata_power_norm | ivectorcache | |
int_itag_power_norm | ivectorcache | |
int_power | ivectorcache | |
int_power_cb(gs::gs_param_base &changed_param, gs::cnf::callback_type reason) | ivectorcache | |
int_power_norm | ivectorcache | |
itag | ivectorcache | |
ivectorcache(ModuleName name, mmu_cache_if *_mmu_cache, mem_if *_tlb_adaptor, unsigned int mmu_en, unsigned int sets, unsigned int setsize, unsigned int setlock, unsigned int linesize, unsigned int repl, unsigned int lram, unsigned int lramstart, unsigned int lramsize, bool pow_mon) | ivectorcache | inline |
locate_line(unsigned const tag, unsigned const idx, unsigned const offset, unsigned const len, sc_core::sc_time *delay) | vectorcache | protected |
lookup_line(unsigned idx, unsigned way) | vectorcache | inlineprotected |
lrr_update(unsigned int idx, unsigned int set_select) | vectorcache | protected |
lru_update(unsigned int idx, unsigned int set_select) | vectorcache | protected |
m_api | vectorcache | protected |
m_burst_en | vectorcache | protected |
m_bytesperline | vectorcache | protected |
m_hit_read_response_delay | vectorcache | protected |
m_idx_bits | vectorcache | protected |
m_linesize | vectorcache | protected |
m_lram | vectorcache | protected |
m_lramsize | vectorcache | protected |
m_lramstart | vectorcache | protected |
m_max_lru | vectorcache | protected |
m_miss_read_response_delay | vectorcache | protected |
m_mmu_cache | vectorcache | protected |
m_mmu_en | vectorcache | protected |
m_new_linefetch_en | vectorcache | protected |
m_number_of_vectors | vectorcache | protected |
m_offset_bits | vectorcache | protected |
m_performance_counters | vectorcache | protected |
m_pow_mon | vectorcache | protected |
m_pseudo_rand | vectorcache | protected |
m_repl | vectorcache | protected |
m_setlock | vectorcache | protected |
m_sets | vectorcache | protected |
m_setsize | vectorcache | protected |
m_tag_bits | vectorcache | protected |
m_tlb_adaptor | vectorcache | protected |
m_wordsperline | vectorcache | protected |
m_write_response_delay | vectorcache | protected |
mem_read(unsigned int address, unsigned int asi, unsigned char *data, unsigned int len, sc_core::sc_time *t, unsigned int *debug, bool is_dbg, bool &cacheable, bool is_lock) | vectorcache | virtual |
mem_write(unsigned int address, unsigned char *data, unsigned int len, sc_core::sc_time *t, unsigned int *debug, bool is_dbg, bool &cacheable) | ivectorcache | |
vectorcache::mem_write(unsigned int address, unsigned int asi, unsigned char *data, unsigned int len, sc_core::sc_time *t, unsigned int *debug, bool is_dbg, bool &cacheable, bool is_lock) | vectorcache | virtual |
nocache enum value | cache_if | |
offset2valid(unsigned int offset, unsigned int len=4) | vectorcache | inlineprotected |
power | ivectorcache | |
power_frame_starting_time | ivectorcache | |
power_model() | ivectorcache | |
read_cache_entry(unsigned int address, unsigned int *data, sc_core::sc_time *t) | vectorcache | virtual |
read_cache_tag(unsigned int address, unsigned int *data, sc_core::sc_time *t) | vectorcache | virtual |
read_config_reg(sc_core::sc_time *t) | vectorcache | virtual |
replacement_selector(unsigned int idx, unsigned int mode) | vectorcache | protected |
rhits | vectorcache | protected |
rmisses | vectorcache | protected |
snoop_invalidate(const t_snoop &snoop, const sc_core::sc_time &delay) | vectorcache | virtual |
sta_idata_power_norm | ivectorcache | |
sta_itag_power_norm | ivectorcache | |
sta_power | ivectorcache | |
sta_power_cb(gs::gs_param_base &changed_param, gs::cnf::callback_type reason) | ivectorcache | |
sta_power_norm | ivectorcache | |
start_of_simulation() | ivectorcache | |
swi_power | ivectorcache | |
swi_power_cb(gs::gs_param_base &changed_param, gs::cnf::callback_type reason) | ivectorcache | |
t_cache_type enum name | cache_if | |
update_line(unsigned const tag, unsigned const idx, unsigned const offset, unsigned const way, unsigned const len, unsigned char *const data, sc_core::sc_time *delay, unsigned *debug, bool &cacheable, bool is_dbg) | vectorcache | protected |
vectorcache(ModuleName name, mmu_cache_if *_mmu_cache, mem_if *_tlb_adaptor, unsigned int mmu_en, unsigned int burst_en, bool new_linefetch_en, unsigned int sets, unsigned int setsize, unsigned int setlock, unsigned int linesize, unsigned int repl, unsigned int lram, unsigned int lramstart, unsigned int lramsize, bool pow_mon) | vectorcache | protected |
whits | vectorcache | protected |
wmisses | vectorcache | protected |
write_cache_entry(unsigned int address, unsigned int *data, sc_core::sc_time *t) | vectorcache | virtual |
write_cache_tag(unsigned int address, unsigned int *data, sc_core::sc_time *t) | vectorcache | virtual |
~cache_if() | cache_if | inlinevirtual |
~ivectorcache() | ivectorcache | inline |
~mem_if() | mem_if | inlinevirtual |
~vectorcache() | vectorcache | protectedvirtual |