Logo SoCRocket

Transaction-Level Modeling Framework for Space Applications

ivectorcache Member List

This is the complete list of members for ivectorcache, including all inherited members.

allocate_line(unsigned const tag, unsigned const idx, unsigned const offset, unsigned const len, unsigned char *const data, sc_core::sc_time *delay, unsigned *debug, bool &cacheable, bool is_dbg)vectorcacheprotected
bypassopsvectorcacheprotected
CACHE_CONFIG_REGvectorcacheprotected
cache_memvectorcacheprotected
check_mode()ivectorcachevirtual
clkcng(sc_core::sc_time &clk)vectorcachevirtual
clockcyclevectorcacheprotected
dbg_out(unsigned int line)vectorcachevirtual
dcache enum valuecache_if
dyn_data_read_energyivectorcache
dyn_data_readsvectorcacheprotected
dyn_data_write_energyivectorcache
dyn_data_writesvectorcacheprotected
dyn_idata_read_energy_normivectorcache
dyn_idata_write_energy_normivectorcache
dyn_itag_read_energy_normivectorcache
dyn_itag_write_energy_normivectorcache
dyn_tag_read_energyivectorcache
dyn_tag_readsvectorcacheprotected
dyn_tag_write_energyivectorcache
dyn_tag_writesvectorcacheprotected
end_of_simulation()vectorcache
flush(sc_core::sc_time *t, unsigned int *debug, bool is_dbg)vectorcachevirtual
GC_HAS_CALLBACKS()ivectorcache
get_address(unsigned tag, unsigned idx, unsigned offset)vectorcacheinlineprotected
get_cache_type()ivectorcachevirtual
get_idx(unsigned address)vectorcacheinlineprotected
get_offset(unsigned address)vectorcacheinlineprotected
get_tag(unsigned address)vectorcacheinlineprotected
icache enum valuecache_if
idataivectorcache
int_idata_power_normivectorcache
int_itag_power_normivectorcache
int_powerivectorcache
int_power_cb(gs::gs_param_base &changed_param, gs::cnf::callback_type reason)ivectorcache
int_power_normivectorcache
itagivectorcache
ivectorcache(ModuleName name, mmu_cache_if *_mmu_cache, mem_if *_tlb_adaptor, unsigned int mmu_en, unsigned int sets, unsigned int setsize, unsigned int setlock, unsigned int linesize, unsigned int repl, unsigned int lram, unsigned int lramstart, unsigned int lramsize, bool pow_mon)ivectorcacheinline
locate_line(unsigned const tag, unsigned const idx, unsigned const offset, unsigned const len, sc_core::sc_time *delay)vectorcacheprotected
lookup_line(unsigned idx, unsigned way)vectorcacheinlineprotected
lrr_update(unsigned int idx, unsigned int set_select)vectorcacheprotected
lru_update(unsigned int idx, unsigned int set_select)vectorcacheprotected
m_apivectorcacheprotected
m_burst_envectorcacheprotected
m_bytesperlinevectorcacheprotected
m_hit_read_response_delayvectorcacheprotected
m_idx_bitsvectorcacheprotected
m_linesizevectorcacheprotected
m_lramvectorcacheprotected
m_lramsizevectorcacheprotected
m_lramstartvectorcacheprotected
m_max_lruvectorcacheprotected
m_miss_read_response_delayvectorcacheprotected
m_mmu_cachevectorcacheprotected
m_mmu_envectorcacheprotected
m_new_linefetch_envectorcacheprotected
m_number_of_vectorsvectorcacheprotected
m_offset_bitsvectorcacheprotected
m_performance_countersvectorcacheprotected
m_pow_monvectorcacheprotected
m_pseudo_randvectorcacheprotected
m_replvectorcacheprotected
m_setlockvectorcacheprotected
m_setsvectorcacheprotected
m_setsizevectorcacheprotected
m_tag_bitsvectorcacheprotected
m_tlb_adaptorvectorcacheprotected
m_wordsperlinevectorcacheprotected
m_write_response_delayvectorcacheprotected
mem_read(unsigned int address, unsigned int asi, unsigned char *data, unsigned int len, sc_core::sc_time *t, unsigned int *debug, bool is_dbg, bool &cacheable, bool is_lock)vectorcachevirtual
mem_write(unsigned int address, unsigned char *data, unsigned int len, sc_core::sc_time *t, unsigned int *debug, bool is_dbg, bool &cacheable)ivectorcache
vectorcache::mem_write(unsigned int address, unsigned int asi, unsigned char *data, unsigned int len, sc_core::sc_time *t, unsigned int *debug, bool is_dbg, bool &cacheable, bool is_lock)vectorcachevirtual
nocache enum valuecache_if
offset2valid(unsigned int offset, unsigned int len=4)vectorcacheinlineprotected
powerivectorcache
power_frame_starting_timeivectorcache
power_model()ivectorcache
read_cache_entry(unsigned int address, unsigned int *data, sc_core::sc_time *t)vectorcachevirtual
read_cache_tag(unsigned int address, unsigned int *data, sc_core::sc_time *t)vectorcachevirtual
read_config_reg(sc_core::sc_time *t)vectorcachevirtual
replacement_selector(unsigned int idx, unsigned int mode)vectorcacheprotected
rhitsvectorcacheprotected
rmissesvectorcacheprotected
snoop_invalidate(const t_snoop &snoop, const sc_core::sc_time &delay)vectorcachevirtual
sta_idata_power_normivectorcache
sta_itag_power_normivectorcache
sta_powerivectorcache
sta_power_cb(gs::gs_param_base &changed_param, gs::cnf::callback_type reason)ivectorcache
sta_power_normivectorcache
start_of_simulation()ivectorcache
swi_powerivectorcache
swi_power_cb(gs::gs_param_base &changed_param, gs::cnf::callback_type reason)ivectorcache
t_cache_type enum namecache_if
update_line(unsigned const tag, unsigned const idx, unsigned const offset, unsigned const way, unsigned const len, unsigned char *const data, sc_core::sc_time *delay, unsigned *debug, bool &cacheable, bool is_dbg)vectorcacheprotected
vectorcache(ModuleName name, mmu_cache_if *_mmu_cache, mem_if *_tlb_adaptor, unsigned int mmu_en, unsigned int burst_en, bool new_linefetch_en, unsigned int sets, unsigned int setsize, unsigned int setlock, unsigned int linesize, unsigned int repl, unsigned int lram, unsigned int lramstart, unsigned int lramsize, bool pow_mon)vectorcacheprotected
whitsvectorcacheprotected
wmissesvectorcacheprotected
write_cache_entry(unsigned int address, unsigned int *data, sc_core::sc_time *t)vectorcachevirtual
write_cache_tag(unsigned int address, unsigned int *data, sc_core::sc_time *t)vectorcachevirtual
~cache_if()cache_ifinlinevirtual
~ivectorcache()ivectorcacheinline
~mem_if()mem_ifinlinevirtual
~vectorcache()vectorcacheprotectedvirtual