Files
file	mmu_cache.h

file	cache_if.h

file	dcio_payload_extension.cpp

file	dcio_payload_extension.h

file	dvectorcache.cpp

file	dvectorcache.h

file	icio_payload_extension.cpp

file	icio_payload_extension.h

file	ivectorcache.cpp

file	ivectorcache.h

file	localram.cpp

file	localram.h

file	mem_if.h

file	mmu.cpp

file	mmu_cache.cpp

file	mmu_cache.h

file	mmu_cache.h

file	mmu_cache_if.h

file	mmu_cache_wrapper.h

file	mmu_if.h

file	nocache.cpp

file	nocache.h

file	tlb_adaptor.h

file	vectorcache.cpp

file	vectorcache.h

Classes
class	Leon3
	Top-level class of the memory sub-system for the TrapGen LEON3 simulator. More...

class	cache_if

class	dcio_payload_extension
	Payload extensions for TLM data cache target socket. More...

struct	t_cache_tag

union	t_cache_data

struct	t_cache_line

struct	t_PTE_context

class	dvectorcache
	Data cache implementation for TrapGen LEON3 simulator. More...

class	icio_payload_extension
	Payload extensions for TLM instruction cache target socket. More...

class	ivectorcache
	Instruction cache implementation for TrapGen LEON3 simulator. More...

class	localram
	Local Scratchpad RAM. More...

class	mem_if

class	mmu
	Memory Management Unit (MMU) for TrapGen LEON3 simulator. More...

class	mmu_cache
	Top-level class of the memory sub-system for the TrapGen LEON3 simulator. More...

class	mmu_cache_base
	Top-level class of the memory sub-system for the TrapGen LEON3 simulator. More...

class	mmu_cache_if

struct	cctrltype

struct	icdiag_in_type

struct	icache_in_type

struct	icache_out_type

struct	dcache_in_type

struct	dcache_out_type

class	mmu_cache_wrapper

class	mmu_if

class	nocache

class	tlb_adaptor

class	vectorcache
	virtual cache model, contain common functionality of instruction and data cache More...

Macros
#define	FROZENMISS_SET(debug) (debug \|= 0x2000)

#define	CACHEBYPASS_SET(debug) (debug \|= 0x1000)

#define	SCRATCHPAD_SET(debug) (debug \|= 0x800)

#define	CACHEREADHIT_SET(debug, cache_set) ((debug &= 0xfffff7f0) \|= (cache_set & 0x3))

#define	CACHEREADMISS_SET(debug, cache_set) (((debug &= 0xfffff7f0) \|= 0x4) \|= (cache_set & 0x3))

#define	CACHEWRITEHIT_SET(debug, cache_set) (((debug &= 0xfffff7f0) \|= 0x8) \|= (cache_set & 0x3))

#define	CACHEWRITEMISS_SET(debug) ((debug &= 0xfffff7f0) \|= 0xc)

#define	CACHEFLUSH_SET(debug) (debug \|= 0x10)

#define	TLBHIT_SET(debug) (debug &= ~(1 << 21));

#define	TLBMISS_SET(debug) (debug \|= (1 << 21));

#define	FROZENMISS_CHECK(debug) (debug & 0x2000)

#define	CACHEBYPASS_CHECK(debug) (debug & 0x1000)

#define	SCRATCHPAD_CHECK(debug) (debug & 0x800)

#define	CACHEREADHIT_CHECK(debug) ((debug & 0xc) == 0)

#define	CACHEREADMISS_CHECK(debug) ((debug & 0xc) == 4)

#define	CACHEWRITEHIT_CHECK(debug) ((debug & 0xc) == 8)

#define	CACHEWRITEMISS_CHECK(debug) (((debug & 0xc) == 0xc) && ((debug & 0x3) == 0))

#define	CACHEFLUSH_CHECK(debug) ((debug & 0x10) == 0x10)

#define	TLBHIT_CHECK(debug) ((debug & (1 << 21)) == 0)

#define	TLBMISS_CHECK(debug) ((debug & (1 << 21)) != 0)

Typedefs
typedef unsigned int	t_VAT

typedef tlm::tlm_generic_payload *	gp_ptr

Enumerations
enum	check_t { NOCHECK, FROZENMISS, NOTFROZENMISS, CACHEBYPASS, SCRATCHPAD, CACHEREADHIT, CACHEREADMISS, CACHEWRITEHIT, CACHEWRITEMISS, CACHEFLUSH, TLBHIT, TLBMISS }

Functions
	Leon3::GC_HAS_CALLBACKS ()

	Leon3::SC_HAS_PROCESS (Leon3)

	Leon3::SR_HAS_SIGNALS (Leon3)

	Leon3::Leon3 (ModuleName name="", bool icen=true, uint32_t irepl=1, uint32_t isets=4, uint32_t ilinesize=8, uint32_t isetsize=8, uint32_t isetlock=true, uint32_t dcen=true, uint32_t drepl=1, uint32_t dsets=2, uint32_t dlinesize=4, uint32_t dsetsize=8, bool dsetlock=true, bool dsnoop=true, bool ilram=false, uint32_t ilramsize=0x000, uint32_t ilramstart=0x000, uint32_t dlram=false, uint32_t dlramsize=0x000, uint32_t dlramstart=0x000, uint32_t cached=0, bool mmu_en=true, uint32_t itlb_num=8, uint32_t dtlb_num=8, uint32_t tlb_type=0, uint32_t tlb_rep=1, uint32_t mmupgsz=0, uint32_t hindex=0, bool pow_mon=false, AbstractionLayer ambaLayer=amba::amba_LT)
	Constructor of the top-level class of the memory sub-system (caches and mmu). More...

	Leon3::~Leon3 ()

void	Leon3::init_generics ()

virtual void	Leon3::clkcng ()

gs::cnf::callback_return_type	Leon3::g_gdb_callback (gs::gs_param_base &changed_param, gs::cnf::callback_type reason)

gs::cnf::callback_return_type	Leon3::g_history_callback (gs::gs_param_base &changed_param, gs::cnf::callback_type reason)

gs::cnf::callback_return_type	Leon3::g_osemu_callback (gs::gs_param_base &changed_param, gs::cnf::callback_type reason)

gs::cnf::callback_return_type	Leon3::g_args_callback (gs::gs_param_base &changed_param, gs::cnf::callback_type reason)

virtual sc_dt::uint64	Leon3::read_dword (const unsigned int &address, const unsigned int asi, const unsigned int flush, const unsigned int lock) throw ()

virtual unsigned int	Leon3::read_word (const unsigned int &address, const unsigned int asi, const unsigned int flush, const unsigned int lock) throw ()

virtual unsigned short int	Leon3::read_half (const unsigned int &address, const unsigned int asi, const unsigned int flush, const unsigned int lock) throw ()

virtual unsigned char	Leon3::read_byte (const unsigned int &address, const unsigned int asi, const unsigned int flush, const unsigned int lock) throw ()

virtual unsigned int	Leon3::read_instr (const unsigned int &address, const unsigned int asi, const unsigned int flush) throw ()

virtual sc_dt::uint64	Leon3::read_dword_dbg (const unsigned int &address) throw ()

virtual unsigned int	Leon3::read_word_dbg (const unsigned int &address) throw ()

virtual unsigned short int	Leon3::read_half_dbg (const unsigned int &address) throw ()

virtual unsigned char	Leon3::read_byte_dbg (const unsigned int &address) throw ()

virtual void	Leon3::write_dword (const unsigned int &address, sc_dt::uint64 datum, const unsigned int asi, const unsigned int flush, const unsigned int lock) throw ()

virtual void	Leon3::write_word (const unsigned int &address, unsigned int datum, const unsigned int asi, const unsigned int flush, const unsigned int lock) throw ()

virtual void	Leon3::write_half (const unsigned int &address, unsigned short int datum, const unsigned int asi, const unsigned int flush, const unsigned int lock) throw ()

virtual void	Leon3::write_byte (const unsigned int &address, unsigned char datum, const unsigned int asi, const unsigned int flush, const unsigned int lock) throw ()

virtual void	Leon3::write_dword_dbg (const unsigned int &address, sc_dt::uint64 datum) throw ()

virtual void	Leon3::write_word_dbg (const unsigned int &address, unsigned int datum) throw ()

virtual void	Leon3::write_half_dbg (const unsigned int &address, unsigned short int datum) throw ()

virtual void	Leon3::write_byte_dbg (const unsigned int &address, unsigned char datum) throw ()

virtual void	Leon3::lock ()

virtual void	Leon3::unlock ()

virtual void	Leon3::trigger_exception (unsigned int exception)
	Sent an exception to the CPU. More...

ostream &	operator<< (ostream &os, const cctrltype &a)

void	sc_trace (sc_trace_file *, const cctrltype &, const std::string &)

int	operator== (const cctrltype &left, const cctrltype &right)

ostream &	operator<< (ostream &os, const icdiag_in_type &a)

void	sc_trace (sc_trace_file *, const icdiag_in_type &, const std::string &)

int	operator== (const icdiag_in_type &left, const icdiag_in_type &right)

ostream &	operator<< (ostream &os, const icache_in_type &a)

void	sc_trace (sc_trace_file *, const icache_in_type &, const std::string &)

int	operator== (const icache_in_type &left, const icache_in_type &right)

ostream &	operator<< (ostream &os, const icache_out_type &a)

void	sc_trace (sc_trace_file *, const icache_out_type &, const std::string &)

int	operator== (const icache_out_type &left, const icache_out_type &right)

ostream &	operator<< (ostream &os, const dcache_in_type &a)

void	sc_trace (sc_trace_file *, const dcache_in_type &, const std::string &)

int	operator== (const dcache_in_type &left, const dcache_in_type &right)

ostream &	operator<< (ostream &os, const dcache_out_type &a)

void	sc_trace (sc_trace_file *, const dcache_out_type &, const std::string &)

int	operator== (const dcache_out_type &left, const dcache_out_type &right)

	dcio_payload_extension::dcio_payload_extension (void)
	constructor More...

	dcio_payload_extension::~dcio_payload_extension (void)
	destructor More...

void	dcio_payload_extension::copy_from (const tlm_extension_base &extension)

tlm::tlm_extension_base *	dcio_payload_extension::clone (void) const

unsigned int	dvectorcache::check_mode ()
	Implement ccr check. More...

t_cache_type	dvectorcache::get_cache_type ()
	Implement cache type function. More...

void	dvectorcache::power_model ()
	Calculate power/energy values from normalized input data. More...

gs::cnf::callback_return_type	dvectorcache::sta_power_cb (gs::gs_param_base &changed_param, gs::cnf::callback_type reason)
	Static power callback. More...

gs::cnf::callback_return_type	dvectorcache::int_power_cb (gs::gs_param_base &changed_param, gs::cnf::callback_type reason)
	Dynamic/Internal power callback. More...

gs::cnf::callback_return_type	dvectorcache::swi_power_cb (gs::gs_param_base &changed_param, gs::cnf::callback_type reason)
	Dynamic/Switching power callback. More...

void	dvectorcache::start_of_simulation ()
	Automatically called at start of simulation. More...

	icio_payload_extension::icio_payload_extension (void)
	constructor More...

	icio_payload_extension::~icio_payload_extension (void)
	destructor More...

void	icio_payload_extension::copy_from (const tlm_extension_base &extension)

tlm::tlm_extension_base *	icio_payload_extension::clone (void) const

void	ivectorcache::mem_write (unsigned int address, unsigned char data, unsigned int len, sc_core::sc_time t, unsigned int *debug, bool is_dbg, bool &cacheable)

unsigned int	ivectorcache::check_mode ()
	Returns the mode bits of the cache. More...

t_cache_type	ivectorcache::get_cache_type ()
	Returns type of cache implementing this interface. More...

void	ivectorcache::power_model ()

gs::cnf::callback_return_type	ivectorcache::sta_power_cb (gs::gs_param_base &changed_param, gs::cnf::callback_type reason)
	Static power callback. More...

gs::cnf::callback_return_type	ivectorcache::int_power_cb (gs::gs_param_base &changed_param, gs::cnf::callback_type reason)
	Dynamic/Internal power callback. More...

gs::cnf::callback_return_type	ivectorcache::swi_power_cb (gs::gs_param_base &changed_param, gs::cnf::callback_type reason)
	Dynamic/Switching power callback. More...

void	ivectorcache::start_of_simulation ()

	localram::localram (ModuleName name, unsigned int lrsize, unsigned int lrstart, bool pow_mon=false)
	Constructor of scratchpad RAM implementation (localram) More...

	localram::~localram ()
	Destructor. More...

virtual bool	localram::mem_read (unsigned int address, unsigned int asi, unsigned char data, unsigned int len, sc_core::sc_time t, unsigned int *debug, bool is_dbg, bool &cacheable)
	Read from scratchpad. More...

virtual void	localram::mem_write (unsigned int address, unsigned int asi, unsigned char data, unsigned int len, sc_core::sc_time t, unsigned int *debug, bool is_dbg, bool &cacheable)
	Write to scratchpad. More...

void	localram::start_of_simulation ()
	Automatically called at the beginning of the simulation. More...

void	localram::power_model ()

gs::cnf::callback_return_type	localram::sta_power_cb (gs::gs_param_base &changed_param, gs::cnf::callback_type reason)
	Static power callback. More...

gs::cnf::callback_return_type	localram::int_power_cb (gs::gs_param_base &changed_param, gs::cnf::callback_type reason)
	Dynamic/Internal power callback. More...

gs::cnf::callback_return_type	localram::swi_power_cb (gs::gs_param_base &changed_param, gs::cnf::callback_type reason)
	Dynamic/Switching power callback. More...

void	localram::end_of_simulation ()
	Hook up for showing statistics. More...

void	localram::clkcng (sc_core::sc_time &clk)
	Helper functions for definition of clock cycle. More...

	mmu::mmu (ModuleName name, mmu_cache_if *_mmu_cache, unsigned int itlbnum, unsigned int dtlbnum, unsigned int tlb_type, unsigned int tlb_rep, unsigned int mmupgsz, bool pow_mon=false)
	Constructor of the Memory Management Unit. More...

	mmu::~mmu ()
	Destructor. More...

signed	mmu::tlb_lookup (unsigned int addr, unsigned asi, std::map< t_VAT, t_PTE_context > tlb, unsigned int tlb_size, sc_core::sc_time t, unsigned int debug, bool is_dbg, bool &cacheable, unsigned is_write, uint64_t paddr)
	Page descriptor cache (PDC) lookup. More...

unsigned int	mmu::read_mcr ()
	Read mmu control register (ASI 0x19) More...

void	mmu::write_mcr (unsigned int *data)
	Write mmu control register (ASI 0x19) More...

unsigned int	mmu::read_mctpr ()
	Read mmu context pointer register (ASI 0x19) More...

void	mmu::write_mctpr (unsigned int *data)
	Write mmu context pointer register (ASI 0x19) More...

unsigned int	mmu::read_mctxr ()
	Read mmu context register (ASI 0x19) More...

void	mmu::write_mctxr (unsigned int *data)
	Write mmu context register (ASI 0x19) More...

unsigned int	mmu::read_mfsr ()
	Read mmu fault status register (ASI 0x19) More...

unsigned int	mmu::read_mfar ()
	Read mmu fault address register (ASI 0x19) More...

void	mmu::diag_read_itlb (unsigned int addr, unsigned int *data)
	Diagnostic read of instruction PDC (ASI 0x5) More...

unsigned int	mmu::tlb_remove (std::map< t_VAT, t_PTE_context > *tlb, unsigned int tlb_size)

void	mmu::lru_update (t_VAT vpn, std::map< t_VAT, t_PTE_context > *tlb, unsigned int tlb_size)
	LRU replacement history updater. More...

void	mmu::diag_write_itlb (unsigned int addr, unsigned int *data)
	Diagnostic write of instruction PDC (ASI 0x5) More...

void	mmu::diag_read_dctlb (unsigned int addr, unsigned int *data)
	Diagnostic read of data PDC or shared instruction and data PDC (ASI 0x6) More...

void	mmu::start_of_simulation ()
	Automatically started at beginning of simulation. More...

void	mmu::power_model ()
	Calculate power/energy values from normalized input data. More...

gs::cnf::callback_return_type	mmu::sta_power_cb (gs::gs_param_base &changed_param, gs::cnf::callback_type reason)
	Static power callback. More...

gs::cnf::callback_return_type	mmu::int_power_cb (gs::gs_param_base &changed_param, gs::cnf::callback_type reason)
	Dynamic/Internal power callback. More...

gs::cnf::callback_return_type	mmu::swi_power_cb (gs::gs_param_base &changed_param, gs::cnf::callback_type reason)
	Dynamic/Switching power callback. More...

void	mmu::end_of_simulation ()
	Displays execution statistics at the end of the simulation. More...

void	mmu::diag_write_dctlb (unsigned int addr, unsigned int *data)
	Diagnostic write of data PDC or shared instruction and data PDC (ASI 0x6) More...

tlb_adaptor *	mmu::get_itlb_if ()
	Return pointer to tlb instruction interface. More...

tlb_adaptor *	mmu::get_dtlb_if ()
	Return pointer to tlb data interface. More...

void	mmu::clkcng (sc_core::sc_time &clk)
	Helper functions for definition of clock cycle. More...

void	mmu::tlb_flush ()
	TLB flush complete. More...

void	mmu::tlb_flush (uint32_t vpn)
	TLB flush certain entry. More...

	mmu_cache::mmu_cache (ModuleName name="", bool icen=true, uint32_t irepl=1, uint32_t isets=4, uint32_t ilinesize=8, uint32_t isetsize=8, uint32_t isetlock=true, uint32_t dcen=true, uint32_t drepl=1, uint32_t dsets=2, uint32_t dlinesize=4, uint32_t dsetsize=8, bool dsetlock=true, bool dsnoop=true, bool ilram=false, uint32_t ilramsize=0x000, uint32_t ilramstart=0x000, uint32_t dlram=false, uint32_t dlramsize=0x000, uint32_t dlramstart=0x000, uint32_t cached=0, bool mmu_en=true, uint32_t itlb_num=8, uint32_t dtlb_num=8, uint32_t tlb_type=0, uint32_t tlb_rep=1, uint32_t mmupgsz=0, uint32_t hindex=0, bool pow_mon=false, AbstractionLayer ambaLayer=amba::amba_LT)
	Constructor of the top-level class of the memory sub-system (caches and mmu). More...

	mmu_cache::~mmu_cache ()

void	mmu_cache::exec_instr (tlm::tlm_generic_payload &trans, sc_core::sc_time &delay, bool is_dbg)
	Instruction interface to functional part of the model. More...

void	mmu_cache::exec_data (tlm::tlm_generic_payload &trans, sc_core::sc_time &delay, bool is_dbg)
	Data interface to functional part of the model. More...

void	mmu_cache::icio_b_transport (tlm::tlm_generic_payload &payload, sc_core::sc_time &delay)
	TLM blocking forward transport function for icio socket. More...

void	mmu_cache::dcio_b_transport (tlm::tlm_generic_payload &payload, sc_core::sc_time &delay)
	TLM blocking forward transport function for dcio socket. More...

tlm::tlm_sync_enum	mmu_cache::icio_nb_transport_fw (tlm::tlm_generic_payload &payload, tlm::tlm_phase &phase, sc_core::sc_time &delay)
	TLM non-blocking forward transport function for icio socket. More...

void	mmu_cache::icio_service_thread ()
	Instruction service thread for AT. More...

tlm::tlm_sync_enum	mmu_cache::dcio_nb_transport_fw (tlm::tlm_generic_payload &payload, tlm::tlm_phase &phase, sc_core::sc_time &delay)
	TLM non-blocking forward transport function for dcio socket. More...

void	mmu_cache::dcio_service_thread ()
	Data service thread for AT. More...

unsigned int	mmu_cache::icio_transport_dbg (tlm::tlm_generic_payload &trans)
	TLM instruction debug transport. More...

unsigned int	mmu_cache::dcio_transport_dbg (tlm::tlm_generic_payload &trans)
	TLM data debug transport. More...

	nocache::nocache (ModuleName name, mem_if *_mem_adapter)
	constructor More...

virtual void	nocache::mem_write (unsigned int address, unsigned int asi, unsigned char data, unsigned int len, sc_core::sc_time t, unsigned int *debug, bool is_dbg, bool &cacheable, bool is_lock=false)
	write through cache More...

virtual bool	nocache::mem_read (unsigned int address, unsigned int asi, unsigned char data, unsigned int len, sc_core::sc_time t, unsigned int *debug, bool is_dbg, bool &cacheable, bool is_lock=false)
	read from cache More...

virtual void	nocache::flush (sc_core::sc_time t, unsigned int debug, bool is_dbg)
	flush cache More...

virtual void	nocache::read_cache_tag (unsigned int address, unsigned int data, sc_core::sc_time t)
	read data cache tags (ASI 0xe) More...

virtual void	nocache::write_cache_tag (unsigned int address, unsigned int data, sc_core::sc_time t)
	write data cache tags (ASI 0xe) More...

virtual void	nocache::read_cache_entry (unsigned int address, unsigned int data, sc_core::sc_time t)
	read data cache entries/data (ASI 0xf) More...

virtual void	nocache::write_cache_entry (unsigned int address, unsigned int data, sc_core::sc_time t)
	write data cache entries/data (ASI 0xf) More...

virtual unsigned int	nocache::read_config_reg (sc_core::sc_time *t)
	read cache configuration register (ASI 0x2) More...

virtual unsigned int	nocache::check_mode ()
	implement ccr check (not there) More...

virtual t_cache_type	nocache::get_cache_type ()
	implement cache type function More...

virtual void	nocache::dbg_out (unsigned int line)
	display of cache lines for debug More...

virtual void	nocache::snoop_invalidate (const t_snoop &snoop, const sc_core::sc_time &delay)
	dummy snooping function More...

void	nocache::clkcng (sc_core::sc_time &clk)
	Helper functions for definition of clock cycle. More...

Variables
LEON3	Leon3::cpu

GDBStub< uint32_t > *	Leon3::debugger

IntrinsicManager< uint32_t >	Leon3::m_intrinsics

sr_param< int >	Leon3::g_gdb

sr_param< std::string >	Leon3::g_history

sr_param< std::string >	Leon3::g_osemu

sr_param< bool >	Leon3::g_icen
	icache enable More...

sr_param< uint32_t >	Leon3::g_irepl

sr_param< uint32_t >	Leon3::g_isets

sr_param< uint32_t >	Leon3::g_ilinesize

sr_param< uint32_t >	Leon3::g_isetsize

sr_param< bool >	Leon3::g_isetlock

sr_param< bool >	Leon3::g_dcen
	dcache enabled More...

sr_param< uint32_t >	Leon3::g_drepl

sr_param< uint32_t >	Leon3::g_dsets

sr_param< uint32_t >	Leon3::g_dlinesize

sr_param< uint32_t >	Leon3::g_dsetsize

sr_param< bool >	Leon3::g_dsetlock

sr_param< bool >	Leon3::g_dsnoop

sr_param< bool >	Leon3::g_ilram
	instruction scratchpad enabled More...

sr_param< uint32_t >	Leon3::g_ilramsize

sr_param< uint32_t >	Leon3::g_ilramstart
	instruction scratchpad starting address More...

sr_param< bool >	Leon3::g_dlram
	data scratchpad enabled More...

sr_param< uint32_t >	Leon3::g_dlramsize

sr_param< uint32_t >	Leon3::g_dlramstart
	data scratchpad starting address More...

sr_param< uint32_t >	Leon3::g_cached
	enables fixed cacheability mask More...

sr_param< bool >	Leon3::g_mmu_en
	mmu enabled More...

sr_param< uint32_t >	Leon3::g_itlb_num

sr_param< uint32_t >	Leon3::g_dtlb_num

sr_param< uint32_t >	Leon3::g_tlb_type

sr_param< uint32_t >	Leon3::g_tlb_rep

sr_param< uint32_t >	Leon3::g_mmupgsz

sr_param< std::vector < std::string > >	Leon3::g_args

*date copyright All rights reserved *Any	reproduction

*date copyright All rights reserved *Any	use

*date copyright All rights reserved Any distribution or disclosure of this	program

*date copyright All rights reserved *Any distribution or disclosure of this without the	express

Interface Data Methods

virtual bool	vectorcache::mem_read (unsigned int address, unsigned int asi, unsigned char data, unsigned int len, sc_core::sc_time t, unsigned int *debug, bool is_dbg, bool &cacheable, bool is_lock)
	Read from cache. More...

virtual void	vectorcache::mem_write (unsigned int address, unsigned int asi, unsigned char data, unsigned int len, sc_core::sc_time t, unsigned int *debug, bool is_dbg, bool &cacheable, bool is_lock)
	Write through cache. More...

Interface Control Methods
Interface Data Methods
virtual unsigned int	vectorcache::read_config_reg (sc_core::sc_time *t)
	Read cache configuration register (ASI 0x2) More...

virtual void	vectorcache::read_cache_tag (unsigned int address, unsigned int data, sc_core::sc_time t)
	Read data cache tags (ASI 0xe) More...

virtual void	vectorcache::write_cache_tag (unsigned int address, unsigned int data, sc_core::sc_time t)
	Write data cache tags (ASI 0xe) More...

virtual void	vectorcache::read_cache_entry (unsigned int address, unsigned int data, sc_core::sc_time t)
	Read data cache entries/data (ASI 0xf) More...

virtual void	vectorcache::write_cache_entry (unsigned int address, unsigned int data, sc_core::sc_time t)
	Write data cache entries/data (ASI 0xf) More...

virtual void	vectorcache::flush (sc_core::sc_time t, unsigned int debug, bool is_dbg)
	Flush cache. More...

virtual void	vectorcache::snoop_invalidate (const t_snoop &snoop, const sc_core::sc_time &delay)
	Snooping function (invalidates cache line(s)) More...

Internal Methods
Interface Control Methods
unsigned int	vectorcache::offset2valid (unsigned int offset, unsigned int len=4)
	Transforms a cache-line offset into a valid mask. More...

unsigned int	vectorcache::replacement_selector (unsigned int idx, unsigned int mode)
	Returns number of the way to be refilled - depending on replacement strategy. More...

void	vectorcache::lrr_update (unsigned int idx, unsigned int set_select)
	Updates the lrr bits for every line replacement. More...

void	vectorcache::lru_update (unsigned int idx, unsigned int set_select)
	Updates the lru counters for every cache hit. More...

int	vectorcache::locate_line (unsigned const tag, unsigned const idx, unsigned const offset, unsigned const len, sc_core::sc_time *delay)
	More...

int	vectorcache::update_line (unsigned const tag, unsigned const idx, unsigned const offset, unsigned const way, unsigned const len, unsigned char const data, sc_core::sc_time delay, unsigned *debug, bool &cacheable, bool is_dbg)
	More...

int	vectorcache::allocate_line (unsigned const tag, unsigned const idx, unsigned const offset, unsigned const len, unsigned char const data, sc_core::sc_time delay, unsigned *debug, bool &cacheable, bool is_dbg)
	More...

Diagnostic Methods
Internal Methods
virtual void	vectorcache::dbg_out (unsigned int line)
	Display of cache lines for debug. More...

void	vectorcache::clkcng (sc_core::sc_time &clk)
	Helper functions for definition of clock cycle. More...

Constructors and Destructors
Diagnostic Methods
	vectorcache::vectorcache (ModuleName name, mmu_cache_if _mmu_cache, mem_if _tlb_adaptor, unsigned int mmu_en, unsigned int burst_en, bool new_linefetch_en, unsigned int sets, unsigned int setsize, unsigned int setlock, unsigned int linesize, unsigned int repl, unsigned int lram, unsigned int lramstart, unsigned int lramsize, bool pow_mon)
	Constructor of data cache. More...

virtual	vectorcache::~vectorcache ()
	Enables power monitoring More...

void	vectorcache::end_of_simulation ()
	More...

Detailed Description

Macro Definition Documentation

#define CACHEBYPASS_CHECK ( debug ) (debug & 0x1000)

#define CACHEBYPASS_SET ( debug ) (debug |= 0x1000)

Referenced by vectorcache::mem_read(), and vectorcache::mem_write().

#define CACHEFLUSH_CHECK ( debug ) ((debug & 0x10) == 0x10)

#define CACHEFLUSH_SET ( debug ) (debug |= 0x10)

Referenced by vectorcache::flush().

#define CACHEREADHIT_CHECK ( debug ) ((debug & 0xc) == 0)

#define CACHEREADHIT_SET	(	debug,
		cache_set
	)	((debug &= 0xfffff7f0) \|= (cache_set & 0x3))

Referenced by vectorcache::mem_read().

#define CACHEREADMISS_CHECK ( debug ) ((debug & 0xc) == 4)

#define CACHEREADMISS_SET	(	debug,
		cache_set
	)	(((debug &= 0xfffff7f0) \|= 0x4) \|= (cache_set & 0x3))

Referenced by vectorcache::mem_read().

#define CACHEWRITEHIT_CHECK ( debug ) ((debug & 0xc) == 8)

#define CACHEWRITEHIT_SET	(	debug,
		cache_set
	)	(((debug &= 0xfffff7f0) \|= 0x8) \|= (cache_set & 0x3))

Referenced by vectorcache::mem_write().

#define CACHEWRITEMISS_CHECK ( debug ) (((debug & 0xc) == 0xc) && ((debug & 0x3) == 0))

#define CACHEWRITEMISS_SET ( debug ) ((debug &= 0xfffff7f0) |= 0xc)

Referenced by vectorcache::mem_write().

#define FROZENMISS_CHECK ( debug ) (debug & 0x2000)

#define FROZENMISS_SET ( debug ) (debug |= 0x2000)

Referenced by vectorcache::mem_read().

#define SCRATCHPAD_CHECK ( debug ) (debug & 0x800)

#define SCRATCHPAD_SET ( debug ) (debug |= 0x800)

Referenced by localram::mem_read(), and localram::mem_write().

#define TLBHIT_CHECK ( debug ) ((debug & (1 << 21)) == 0)

#define TLBHIT_SET ( debug ) (debug &= ~(1 << 21));

#define TLBMISS_CHECK ( debug ) ((debug & (1 << 21)) != 0)

#define TLBMISS_SET ( debug ) (debug |= (1 << 21));

Typedef Documentation

typedef tlm::tlm_generic_payload* gp_ptr

typedef unsigned int t_VAT

Enumeration Type Documentation

enum check_t

Enumerator
NOCHECK
FROZENMISS
NOTFROZENMISS
CACHEBYPASS
SCRATCHPAD
CACHEREADHIT
CACHEREADMISS
CACHEWRITEHIT
CACHEWRITEMISS
CACHEFLUSH
TLBHIT
TLBMISS

Function Documentation

int vectorcache::allocate_line	(	unsigned const	tag,
		unsigned const	idx,
		unsigned const	offset,
		unsigned const	len,
		unsigned char *const	data,
		sc_core::sc_time *	delay,
		unsigned *	debug,
		bool &	cacheable,
		bool	is_dbg
	)

protected

Allocates a cache line in either an invalid way or a way found be replacement selection. Updates timing and power information. Returns the allocated way, otherwise -1.

Reads data from memory and inserts it into cache. Returns the allocated way, otherwise -1. Used by mem_read() and mem_write() with write-allocate.

References vectorcache::lookup_line(), vectorcache::m_new_linefetch_en, vectorcache::m_repl, vectorcache::m_sets, vectorcache::offset2valid(), vectorcache::replacement_selector(), srDebug, and vectorcache::update_line().

Referenced by vectorcache::mem_read().

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unsigned int dvectorcache::check_mode ( )

virtual

Implement ccr check.

Implements vectorcache.

References vectorcache::m_mmu_cache, and mmu_cache_if::read_ccr().

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unsigned int ivectorcache::check_mode ( )

virtual

Returns the mode bits of the cache.

Implements vectorcache.

References vectorcache::m_mmu_cache, and mmu_cache_if::read_ccr().

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unsigned int nocache::check_mode ( )

virtual

implement ccr check (not there)

forbidden check of cache mode

Implements cache_if.

References setup::name, and v::warn.

void localram::clkcng ( sc_core::sc_time & clk )

Helper functions for definition of clock cycle.

References localram::clockcycle.

Referenced by mmu_cache_base::clkcng().

void nocache::clkcng ( sc_core::sc_time & clk )

virtual

Helper functions for definition of clock cycle.

Implements cache_if.

void Leon3::clkcng ( )

virtual

Reimplemented from CLKDevice.

References mmu_cache_base::clkcng(), CLKDevice::clock_cycle, Leon3::cpu, and leon3_funclt_trap::Processor_leon3_funclt::latency.

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void mmu::clkcng ( sc_core::sc_time & clk )

Helper functions for definition of clock cycle.

References mmu::clockcycle.

Referenced by mmu_cache_base::clkcng().

void vectorcache::clkcng ( sc_core::sc_time & clk )

virtual

Helper functions for definition of clock cycle.

Sets clock cycle latency using sc_clock argument

Implements cache_if.

References vectorcache::clockcycle.

tlm::tlm_extension_base * icio_payload_extension::clone ( void ) const

References icio_payload_extension::icio_payload_extension().

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tlm::tlm_extension_base * dcio_payload_extension::clone ( void ) const

References dcio_payload_extension::dcio_payload_extension().

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void dcio_payload_extension::copy_from ( const tlm_extension_base & extension )

References dcio_payload_extension::asi, dcio_payload_extension::debug, dcio_payload_extension::fail, dcio_payload_extension::flush, dcio_payload_extension::flushl, and dcio_payload_extension::lock.

void icio_payload_extension::copy_from ( const tlm_extension_base & extension )

References icio_payload_extension::debug, icio_payload_extension::fail, icio_payload_extension::fline, icio_payload_extension::flush, and icio_payload_extension::flushl.

void nocache::dbg_out ( unsigned int line )

virtual

display of cache lines for debug

forbidden debug output

Implements cache_if.

References setup::name, and v::warn.

void vectorcache::dbg_out ( unsigned int line )

virtual

Display of cache lines for debug.

Displays cache lines for debugging.

Implements cache_if.

References vectorcache::lookup_line(), vectorcache::m_sets, vectorcache::m_wordsperline, srDebug, and swap_Endianess().

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void mmu_cache::dcio_b_transport	(	tlm::tlm_generic_payload &	payload,
		sc_core::sc_time &	delay
	)

TLM blocking forward transport function for dcio socket.

TLM forward blocking transport function for dcio socket.

References v::analysis, v::debug, exec_data(), mmu_cache_base::globl_count, and setup::name.

Referenced by mmu_cache().

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tlm::tlm_sync_enum mmu_cache::dcio_nb_transport_fw	(	tlm::tlm_generic_payload &	payload,
		tlm::tlm_phase &	phase,
		sc_core::sc_time &	delay
	)

TLM non-blocking forward transport function for dcio socket.

References v::analysis, dcio_PEQ, v::debug, v::error, mmu_cache_base::globl_count, and setup::name.

Referenced by mmu_cache().

dcio_payload_extension::dcio_payload_extension ( void )

constructor

Referenced by dcio_payload_extension::clone().

void mmu_cache::dcio_service_thread ( )

Data service thread for AT.

Processes transactions from the dcio_PEQ. Contains a state machine to manage the communication path back to the data initiator Is registered as an SC_THREAD and sensitive to dcio_PEQ.get_event()

References dcio, dcio_PEQ, v::debug, v::error, exec_data(), setup::name, trans, and pysc::api::systemc::wait().

Referenced by mmu_cache().

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unsigned int mmu_cache::dcio_transport_dbg ( tlm::tlm_generic_payload & trans )

TLM data debug transport.

References exec_data().

Referenced by mmu_cache().

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void mmu::diag_read_dctlb	(	unsigned int	addr,
		unsigned int *	data
	)

virtual

Diagnostic read of data PDC or shared instruction and data PDC (ASI 0x6)

Implements mmu_if.

References v::debug, mmu::dtlb, mmu::m_vtag_width, setup::name, mmu::pdciter, and swap_Endianess().

Referenced by mmu_cache_base::exec_data().

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void mmu::diag_read_itlb	(	unsigned int	addr,
		unsigned int *	data
	)

virtual

Diagnostic read of instruction PDC (ASI 0x5)

Implements mmu_if.

References v::debug, mmu::itlb, mmu::m_vtag_width, setup::name, mmu::pdciter, and swap_Endianess().

Referenced by mmu_cache_base::exec_data().

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void mmu::diag_write_dctlb	(	unsigned int	addr,
		unsigned int *	data
	)

virtual

Diagnostic write of data PDC or shared instruction and data PDC (ASI 0x6)

Implements mmu_if.

Referenced by mmu_cache_base::exec_data().

void mmu::diag_write_itlb	(	unsigned int	addr,
		unsigned int *	data
	)

virtual

Diagnostic write of instruction PDC (ASI 0x5)

Implements mmu_if.

Referenced by mmu_cache_base::exec_data().

void localram::end_of_simulation ( )

Hook up for showing statistics.

References setup::name, v::report, localram::sreads, localram::sreads_byte, localram::swrites, and localram::swrites_byte.

void mmu::end_of_simulation ( )

Displays execution statistics at the end of the simulation.

References i, mmu::m_dtlbnum, mmu::m_itlbnum, mmu::m_tlb_type, setup::name, v::report, mmu::tdhits, mmu::tdmisses, mmu::tihits, and mmu::timisses.

void vectorcache::end_of_simulation ( )

Print execution statistic at end of simulation

References vectorcache::bypassops, i, vectorcache::m_sets, setup::name, v::report, vectorcache::rhits, vectorcache::rmisses, vectorcache::whits, and vectorcache::wmisses.

void mmu_cache::exec_data	(	tlm::tlm_generic_payload &	trans,
		sc_core::sc_time &	delay,
		bool	is_dbg
	)

Data interface to functional part of the model.

References dcio_payload_extension::asi, dcio_payload_extension::debug, v::debug, mmu_cache_base::dyn_reads, mmu_cache_base::dyn_writes, v::error, mmu_cache_base::exec_data(), flush(), dcio_payload_extension::flush, dcio_payload_extension::lock, mmu_cache_base::m_pow_mon, and setup::name.

Referenced by dcio_b_transport(), dcio_service_thread(), and dcio_transport_dbg().

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void mmu_cache::exec_instr	(	tlm::tlm_generic_payload &	trans,
		sc_core::sc_time &	delay,
		bool	is_dbg
	)

Instruction interface to functional part of the model.

References mmu_cache_base::dcache, icio_payload_extension::debug, v::debug, mmu_cache_base::dyn_reads, v::error, mmu_cache_base::exec_instr(), flush(), cache_if::flush(), icio_payload_extension::flush, mmu_cache_base::icache, mmu_cache_base::m_pow_mon, and setup::name.

Referenced by icio_b_transport(), icio_service_thread(), and icio_transport_dbg().

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void nocache::flush	(	sc_core::sc_time *	t,
		unsigned int *	debug,
		bool	is_dbg
	)

virtual

flush cache

forbidden access to flush

Implements cache_if.

References setup::name, and v::warn.

void vectorcache::flush	(	sc_core::sc_time *	t,
		unsigned int *	debug,
		bool	is_dbg
	)

virtual

Flush cache.

cache_if::Flush cache

Implements cache_if.

References vectorcache::cache_mem, CACHEFLUSH_SET, v::debug, and srDebug.

gs::cnf::callback_return_type Leon3::g_args_callback	(	gs::gs_param_base &	changed_param,
		gs::cnf::callback_type	reason
	)

References Leon3::g_args, GC_RETURN_OK, i, Leon3::m_intrinsics, setup::options, and sr_param< std::vector< std::string > >::size().

Referenced by Leon3::Leon3().

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gs::cnf::callback_return_type Leon3::g_gdb_callback	(	gs::gs_param_base &	changed_param,
		gs::cnf::callback_type	reason
	)

References leon3_funclt_trap::Processor_leon3_funclt::abiIf, trap::ToolsManager< issueWidth >::addTool(), Leon3::cpu, Leon3::debugger, GC_RETURN_OK, and leon3_funclt_trap::Processor_leon3_funclt::toolManager.

Referenced by Leon3::Leon3().

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gs::cnf::callback_return_type Leon3::g_history_callback	(	gs::gs_param_base &	changed_param,
		gs::cnf::callback_type	reason
	)

gs::cnf::callback_return_type Leon3::g_osemu_callback	(	gs::gs_param_base &	changed_param,
		gs::cnf::callback_type	reason
	)

Leon3::GC_HAS_CALLBACKS ( )

cache_if::t_cache_type dvectorcache::get_cache_type ( )

virtual

Implement cache type function.

Implements vectorcache.

References cache_if::dcache.

cache_if::t_cache_type ivectorcache::get_cache_type ( )

virtual

Returns type of cache implementing this interface.

Implements vectorcache.

References cache_if::icache.

cache_if::t_cache_type nocache::get_cache_type ( )

virtual

implement cache type function

this is a cache dummy

Implements cache_if.

References cache_if::nocache.

tlb_adaptor * mmu::get_dtlb_if ( )

Return pointer to tlb data interface.

References mmu::dtlb_adaptor.

Referenced by mmu_cache_base::mmu_cache_base().

tlb_adaptor * mmu::get_itlb_if ( )

Return pointer to tlb instruction interface.

References mmu::itlb_adaptor.

Referenced by mmu_cache_base::mmu_cache_base().

void mmu_cache::icio_b_transport	(	tlm::tlm_generic_payload &	payload,
		sc_core::sc_time &	delay
	)

TLM blocking forward transport function for icio socket.

References v::analysis, v::debug, exec_instr(), mmu_cache_base::globl_count, and setup::name.

Referenced by mmu_cache().

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tlm::tlm_sync_enum mmu_cache::icio_nb_transport_fw	(	tlm::tlm_generic_payload &	payload,
		tlm::tlm_phase &	phase,
		sc_core::sc_time &	delay
	)

TLM non-blocking forward transport function for icio socket.

References v::analysis, v::debug, v::error, mmu_cache_base::globl_count, icio_PEQ, v::info, and setup::name.

Referenced by mmu_cache().

icio_payload_extension::icio_payload_extension ( void )

constructor

Referenced by icio_payload_extension::clone().

void mmu_cache::icio_service_thread ( )

Instruction service thread for AT.

Processes transactions from the icio_PEQ. Contains a state machine to manage the communication path back to instruction initiator Is registered as an SC_THREAD and sensitive to icio_PEQ.get_event()

References v::debug, v::error, exec_instr(), icio, icio_PEQ, setup::name, trans, and pysc::api::systemc::wait().

Referenced by mmu_cache().

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unsigned int mmu_cache::icio_transport_dbg ( tlm::tlm_generic_payload & trans )

TLM instruction debug transport.

References exec_instr().

Referenced by mmu_cache().

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void Leon3::init_generics ( )

virtual

Reimplemented from BaseModule< DefaultBase >.

References sr_param_base::add_properties(), Leon3::g_cached, Leon3::g_dcen, Leon3::g_dlinesize, Leon3::g_dlram, Leon3::g_dlramsize, Leon3::g_dlramstart, Leon3::g_drepl, Leon3::g_dsetlock, Leon3::g_dsets, Leon3::g_dsetsize, Leon3::g_dsnoop, Leon3::g_dtlb_num, AHBDevice< BaseModule< DefaultBase > >::g_hindex, Leon3::g_icen, Leon3::g_ilinesize, Leon3::g_ilram, Leon3::g_ilramsize, Leon3::g_ilramstart, Leon3::g_irepl, Leon3::g_isetlock, Leon3::g_isets, Leon3::g_isetsize, Leon3::g_itlb_num, Leon3::g_mmu_en, Leon3::g_mmupgsz, Leon3::g_tlb_rep, and Leon3::g_tlb_type.

Referenced by Leon3::Leon3().

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gs::cnf::callback_return_type dvectorcache::int_power_cb	(	gs::gs_param_base &	changed_param,
		gs::cnf::callback_type	reason
	)

Dynamic/Internal power callback.

References GC_RETURN_OK.

gs::cnf::callback_return_type ivectorcache::int_power_cb	(	gs::gs_param_base &	changed_param,
		gs::cnf::callback_type	reason
	)

Dynamic/Internal power callback.

References GC_RETURN_OK.

gs::cnf::callback_return_type localram::int_power_cb	(	gs::gs_param_base &	changed_param,
		gs::cnf::callback_type	reason
	)

Dynamic/Internal power callback.

References GC_RETURN_OK.

Referenced by localram::localram().

gs::cnf::callback_return_type mmu::int_power_cb	(	gs::gs_param_base &	changed_param,
		gs::cnf::callback_type	reason
	)

Dynamic/Internal power callback.

References GC_RETURN_OK.

Referenced by mmu::mmu().

Leon3::Leon3	(	ModuleName	name = `""`,
		bool	icen = `true`,
		uint32_t	irepl = `1`,
		uint32_t	isets = `4`,
		uint32_t	ilinesize = `8`,
		uint32_t	isetsize = `8`,
		uint32_t	isetlock = `true`,
		uint32_t	dcen = `true`,
		uint32_t	drepl = `1`,
		uint32_t	dsets = `2`,
		uint32_t	dlinesize = `4`,
		uint32_t	dsetsize = `8`,
		bool	dsetlock = `true`,
		bool	dsnoop = `true`,
		bool	ilram = `false`,
		uint32_t	ilramsize = `0x000`,
		uint32_t	ilramstart = `0x000`,
		uint32_t	dlram = `false`,
		uint32_t	dlramsize = `0x000`,
		uint32_t	dlramstart = `0x000`,
		uint32_t	cached = `0`,
		bool	mmu_en = `true`,
		uint32_t	itlb_num = `8`,
		uint32_t	dtlb_num = `8`,
		uint32_t	tlb_type = `0`,
		uint32_t	tlb_rep = `1`,
		uint32_t	mmupgsz = `0`,
		uint32_t	hindex = `0`,
		bool	pow_mon = `false`,
		AbstractionLayer	ambaLayer = `amba::amba_LT`
	)

Constructor of the top-level class of the memory sub-system (caches and mmu).

Constructor.

Select LT or AT abstraction

Parameters

name	SystemC module name
icen	instruction cache enable
irepl	instruction cache replacement strategy
isets	number of instruction cache sets
ilinesize	instruction cache line size (in bytes)
isetsize	size of an instruction cache set (in kbytes)
isetlock	enable instruction cache locking
dcen	data cache enable
drepl	data cache replacement strategy
dsets	number of data cache sets
dlinesize	data cache line size (in bytes)
dsetsize	size of a data cache set (in kbytes)
dsetlock	enable data cache locking
dsnoop	enable data cache snooping
ilram	enable instruction scratch pad
ilramsize	size of the instruction scratch pad (in kbytes)
ilramstart	start address of the instruction scratch pad
dlram	enable data scratch pad
dlramsize	size of the data scratch pad (in kbytes)
dlramstart	start address of the data scratch pad
cached	fixed cacheability mask
mmu_en	mmu enable
itlb_num	number of instruction TLBs
dtlb_num	number of data TLBs
tlb_type	split or shared instruction and data TLBs
tlb_rep	TLB replacement strategy
mmupgsz	MMU page size
hindex	ID of the bus master
pow_mon	Enable power monitoring

References trap::ToolsManager< issueWidth >::addTool(), Leon3::cpu, leon3_funclt_trap::Processor_leon3_funclt::ENTRY_POINT, Leon3::g_args, Leon3::g_args_callback(), Leon3::g_gdb, Leon3::g_gdb_callback(), Leon3::init_generics(), Leon3::m_intrinsics, leon3_funclt_trap::Processor_leon3_funclt::MPROC_ID, usi.cci.callback::post_write, and leon3_funclt_trap::Processor_leon3_funclt::toolManager.

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localram::localram	(	ModuleName	name,
		unsigned int	lrsize,
		unsigned int	lrstart,
		bool	pow_mon = `false`
	)

Constructor of scratchpad RAM implementation (localram)

constructor

Parameters

name	SystemC module name
lrsize	Local ram size. Size in kbyte = 2^lrsize (like top-level template)
lrstart	Local ram start address. The 8 most significant bits of the address.

References t_cache_data::i, v::info, localram::int_power, localram::int_power_cb(), localram::m_api, localram::m_default_entry, localram::m_lrsize, localram::m_lrstart, localram::m_pow_mon, setup::name, usi.cci.callback::pre_read, localram::scratchpad, localram::sta_power, localram::sta_power_cb(), localram::swi_power, and localram::swi_power_cb().

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int vectorcache::locate_line	(	unsigned const	tag,
		unsigned const	idx,
		unsigned const	offset,
		unsigned const	len,
		sc_core::sc_time *	delay
	)

protected

Searches for a cache tag in all cache ways. Updates power information for reading tags. Returns found way if tag matches and data is valid, otherwise -1.

Searches for a cache line in all cache ways. Returns found way, otherwise -1.

References vectorcache::clockcycle, vectorcache::dyn_tag_reads, vectorcache::lookup_line(), vectorcache::m_new_linefetch_en, vectorcache::m_pow_mon, vectorcache::m_sets, vectorcache::offset2valid(), and srDebug.

Referenced by vectorcache::mem_read(), and vectorcache::mem_write().

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void Leon3::lock ( )

virtual

Implements leon3_funclt_trap::MemoryInterface.

void vectorcache::lrr_update	(	unsigned int	idx,
		unsigned int	way_select
	)

protected

Updates the lrr bits for every line replacement.

Updates the LRR bits for every line replacement

References vectorcache::lookup_line(), and srDebug.

Referenced by vectorcache::update_line().

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void vectorcache::lru_update	(	unsigned int	idx,
		unsigned int	way_select
	)

protected

Updates the lru counters for every cache hit.

Updates the LRU counters for every cache hit

References vectorcache::lookup_line(), vectorcache::m_max_lru, vectorcache::m_sets, and srDebug.

Referenced by vectorcache::mem_read(), and vectorcache::update_line().

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void mmu::lru_update	(	t_VAT	vpn,
		std::map< t_VAT, t_PTE_context > *	tlb,
		unsigned int	tlb_size
	)

LRU replacement history updater.

References v::debug, and setup::name.

bool nocache::mem_read	(	unsigned int	address,
		unsigned int	asi,
		unsigned char *	data,
		unsigned int	len,
		sc_core::sc_time *	t,
		unsigned int *	debug,
		bool	is_dbg,
		bool &	cacheable,
		bool	is_lock = `false`
	)

virtual

read from cache

memory interface read functions: forwards calls to mmu or bus interface

Reimplemented from mem_if.

References mem_if::mem_read(), setup::name, and v::warn.

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bool vectorcache::mem_read	(	unsigned int	address,
		unsigned int	asi,
		unsigned char *	data,
		unsigned int	len,
		sc_core::sc_time *	delay,
		unsigned int *	debug,
		bool	is_dbg,
		bool &	cacheable,
		bool	is_lock
	)

virtual

Read from cache.

mem_if::Read from cache

The behavior is as follows: (!bypass-mmu && (enabled || frozen)) ? read_cache (forced-miss || !found) ? read_mem found? update_cache : (!frozen && cacheable)? allocate_cache : bypass-mmu ? read_mem(phys) : disabled? read_mem

!Bypass MMU && (Enabled || Frozen): Search cache

NOTE: This should possibly go to locate_line. locate_line is also used by mem_write, however. It is unclear whether a cache lookup in mem_write also (unnecessarily) reads the data lines or just the tag lines. I've assumed the latter.

!Forced miss && In cache: Read from cache

Forced miss || !In cache: Read from memory

In cache (&& Forced miss): Update cache

!In cache && !Frozen && Cacheable: Allocate cache line

!In cache && (Frozen || !Cacheable)

Bypass MMU || Disabled: Read from memory

Reimplemented from mem_if.

References vectorcache::allocate_line(), vectorcache::bypassops, CACHEBYPASS_SET, CACHEREADHIT_SET, CACHEREADMISS_SET, vectorcache::check_mode(), vectorcache::clockcycle, vectorcache::dyn_data_reads, FROZENMISS_SET, vectorcache::get_idx(), vectorcache::get_offset(), vectorcache::get_tag(), vectorcache::locate_line(), vectorcache::lookup_line(), vectorcache::lru_update(), vectorcache::m_burst_en, vectorcache::m_bytesperline, vectorcache::m_linesize, vectorcache::m_mmu_cache, vectorcache::m_new_linefetch_en, vectorcache::m_pow_mon, vectorcache::m_repl, vectorcache::m_sets, vectorcache::m_tlb_adaptor, mem_if::mem_read(), offset, mmu_cache_if::read_ccr(), vectorcache::rhits, vectorcache::rmisses, srAnalyse, srDebug, and vectorcache::update_line().

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bool localram::mem_read	(	unsigned int	address,
		unsigned int	asi,
		unsigned char *	data,
		unsigned int	len,
		sc_core::sc_time *	t,
		unsigned int *	debug,
		bool	is_dbg,
		bool &	cacheable
	)

virtual

Read from scratchpad.

References t_cache_data::c, localram::clockcycle, v::debug, v::error, i, localram::m_lrsize, localram::m_lrstart, setup::name, localram::scratchpad, SCRATCHPAD_SET, localram::sreads, and localram::sreads_byte.

Referenced by mmu_cache_base::exec_data(), and mmu_cache_base::exec_instr().

void ivectorcache::mem_write	(	unsigned int	address,
		unsigned char *	data,
		unsigned int	len,
		sc_core::sc_time *	t,
		unsigned int *	debug,
		bool	is_dbg,
		bool &	cacheable
	)

References v::info, and setup::name.

void nocache::mem_write	(	unsigned int	address,
		unsigned int	asi,
		unsigned char *	data,
		unsigned int	len,
		sc_core::sc_time *	t,
		unsigned int *	debug,
		bool	is_dbg,
		bool &	cacheable,
		bool	is_lock = `false`
	)

virtual

write through cache

memory interface write function: forwards calls to mmu or bus interface

Reimplemented from mem_if.

References mem_if::mem_write(), setup::name, and v::warn.

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void vectorcache::mem_write	(	unsigned int	address,
		unsigned int	asi,
		unsigned char *	data,
		unsigned int	len,
		sc_core::sc_time *	delay,
		unsigned int *	debug,
		bool	is_dbg,
		bool &	cacheable,
		bool	is_lock
	)

virtual

Write through cache.

mem_if::Write cache

The behavior depends on the write_policy and write_alloc chosen:

A cache hit:
- updates the copy in the cache;
- and either
  - updates the memory for write-through; or
  - does not update the memory for write-back.
A cache miss:
- either
  - allocates a new cache entry for write-allocate; or
  - does not allocate a new cache entry for non-write-allocate;
- and either
  - updates the memory for write-through or non-write-allocate; or
  - does not update the memory for write-back and write-allocate. NOTE: write-through is usually combined with non-write-allocate (allocating does not help since memory will be written anyway), while write-back is combined with write-allocate (allocating results in hits for subsequent writes to the same block). NOTE: The standard LEON3 cache is write-through + non-write-allocate. The behavior is as follows: (!bypass-mmu && (enabled || frozen)) ? read_cache found? update_cache : (!frozen && write-allocate && cacheable)? allocate_cache; found = true (!found || write-through)? write_mem : bypass-mmu ? write_mem(phys) : disabled? write_mem

!Bypass MMU && (Enabled || Frozen): Search cache

In cache: Update cache

!In cache

TODO: Implement write buffer

Bypass MMU || Disabled

Reimplemented from mem_if.

References vectorcache::bypassops, CACHEBYPASS_SET, CACHEWRITEHIT_SET, CACHEWRITEMISS_SET, vectorcache::check_mode(), vectorcache::clockcycle, vectorcache::get_idx(), vectorcache::get_offset(), vectorcache::get_tag(), vectorcache::locate_line(), vectorcache::m_tlb_adaptor, mem_if::mem_write(), offset, srAnalyse, srDebug, vectorcache::update_line(), vectorcache::whits, and vectorcache::wmisses.

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void localram::mem_write	(	unsigned int	address,
		unsigned int	asi,
		unsigned char *	data,
		unsigned int	len,
		sc_core::sc_time *	t,
		unsigned int *	debug,
		bool	is_dbg,
		bool &	cacheable
	)

virtual

Write to scratchpad.

References localram::clockcycle, v::debug, v::error, i, localram::m_lrsize, localram::m_lrstart, setup::name, localram::scratchpad, SCRATCHPAD_SET, localram::swrites, and localram::swrites_byte.

Referenced by mmu_cache_base::exec_data().

mmu::mmu	(	ModuleName	name,
		mmu_cache_if *	_mmu_cache,
		unsigned int	itlbnum,
		unsigned int	dtlbnum,
		unsigned int	tlb_type,
		unsigned int	tlb_rep,
		unsigned int	mmupgsz,
		bool	pow_mon = `false`
	)

Constructor of the Memory Management Unit.

Parameters

name	SystemC module name,
itlbnum	Number of instruction TLBs
dtlbnum	Number of data TLBs
tlb_type	Type of TLB (shared or distinct)
tlb_rep	TLB replacement strategy
mmupgsz	MMU page size (default 4kB)

References mmu::access_table, v::debug, mmu::dtlb, mmu::dtlb_adaptor, v::error, i, v::info, mmu::int_power, mmu::int_power_cb(), mmu::itlb, mmu::itlb_adaptor, mmu::m_api, mmu::m_dtlblog2, mmu::m_dtlbnum, mmu::m_idx1, mmu::m_idx2, mmu::m_idx3, mmu::m_itlblog2, mmu::m_itlbnum, mmu::m_pow_mon, mmu::m_tlb_type, mmu::m_vtag_width, mmu::MMU_CONTEXT_REG, mmu::MMU_CONTEXT_TABLE_POINTER_REG, mmu::MMU_CONTROL_REG, mmu::MMU_FAULT_ADDRESS_REG, mmu::MMU_FAULT_STATUS_REG, setup::name, usi.cci.callback::pre_read, mmu::sta_power, mmu::sta_power_cb(), mmu::swi_power, mmu::swi_power_cb(), mmu::tdhits, mmu::tdmisses, mmu::tihits, and mmu::timisses.

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mmu_cache::mmu_cache	(	ModuleName	name = `""`,
		bool	icen = `true`,
		uint32_t	irepl = `1`,
		uint32_t	isets = `4`,
		uint32_t	ilinesize = `8`,
		uint32_t	isetsize = `8`,
		uint32_t	isetlock = `true`,
		uint32_t	dcen = `true`,
		uint32_t	drepl = `1`,
		uint32_t	dsets = `2`,
		uint32_t	dlinesize = `4`,
		uint32_t	dsetsize = `8`,
		bool	dsetlock = `true`,
		bool	dsnoop = `true`,
		bool	ilram = `false`,
		uint32_t	ilramsize = `0x000`,
		uint32_t	ilramstart = `0x000`,
		uint32_t	dlram = `false`,
		uint32_t	dlramsize = `0x000`,
		uint32_t	dlramstart = `0x000`,
		uint32_t	cached = `0`,
		bool	mmu_en = `true`,
		uint32_t	itlb_num = `8`,
		uint32_t	dtlb_num = `8`,
		uint32_t	tlb_type = `0`,
		uint32_t	tlb_rep = `1`,
		uint32_t	mmupgsz = `0`,
		uint32_t	hindex = `0`,
		bool	pow_mon = `false`,
		AbstractionLayer	ambaLayer = `amba::amba_LT`
	)

Constructor of the top-level class of the memory sub-system (caches and mmu).

Constructor.

Select LT or AT abstraction

Parameters

name	SystemC module name
icen	instruction cache enable
irepl	instruction cache replacement strategy
isets	number of instruction cache sets
ilinesize	instruction cache line size (in bytes)
isetsize	size of an instruction cache set (in kbytes)
isetlock	enable instruction cache locking
dcen	data cache enable
drepl	data cache replacement strategy
dsets	number of data cache sets
dlinesize	data cache line size (in bytes)
dsetsize	size of a data cache set (in kbytes)
dsetlock	enable data cache locking
dsnoop	enable data cache snooping
ilram	enable instruction scratch pad
ilramsize	size of the instruction scratch pad (in kbytes)
ilramstart	start address of the instruction scratch pad
dlram	enable data scratch pad
dlramsize	size of the data scratch pad (in kbytes)
dlramstart	start address of the data scratch pad
cached	fixed cacheability mask
mmu_en	mmu enable
itlb_num	number of instruction TLBs
dtlb_num	number of data TLBs
tlb_type	split or shared instruction and data TLBs
tlb_rep	TLB replacement strategy
mmupgsz	MMU page size
hindex	ID of the bus master
pow_mon	Enable power monitoring

References dcio, dcio_b_transport(), dcio_nb_transport_fw(), dcio_PEQ, dcio_service_thread(), dcio_transport_dbg(), icio, icio_b_transport(), icio_nb_transport_fw(), icio_PEQ, icio_service_thread(), icio_transport_dbg(), and srError.

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nocache::nocache	(	ModuleName	name,
		mem_if *	_mem_adapter
	)

constructor

unsigned int vectorcache::offset2valid	(	unsigned int	offset,
		unsigned int	len = `4`
	)

inlineprotected

Transforms a cache-line offset into a valid mask.

Cache lines can hold either 16 bytes or 32 bytes. Valid bits are defined for each word, hence 4 or 8 bits per cache line. The len parameter is the number of bytes to be accessed from the cache line and defaults to 4. Offset is in bytes and is first divided by 4 to give the word offset. Since lines can have a max of 8 words, we mask an 8-bit valid field to find out whether the data at the calculated word offset is valid. NOTE: This function does not perform alignment checks.

References vectorcache::m_bytesperline, and srWarn.

Referenced by vectorcache::allocate_line(), vectorcache::locate_line(), vectorcache::snoop_invalidate(), and vectorcache::update_line().

ostream& operator<<	(	ostream &	os,
		const cctrltype &	a
	)

inline

ostream& operator<<	(	ostream &	os,
		const icdiag_in_type &	a
	)

inline

ostream& operator<<	(	ostream &	os,
		const icache_in_type &	a
	)

inline

ostream& operator<<	(	ostream &	os,
		const icache_out_type &	a
	)

inline

ostream& operator<<	(	ostream &	os,
		const dcache_in_type &	a
	)

inline

ostream& operator<<	(	ostream &	os,
		const dcache_out_type &	a
	)

inline

int operator==	(	const cctrltype &	left,
		const cctrltype &	right
	)

inline

int operator==	(	const icdiag_in_type &	left,
		const icdiag_in_type &	right
	)

inline

int operator==	(	const icache_in_type &	left,
		const icache_in_type &	right
	)

inline

int operator==	(	const icache_out_type &	left,
		const icache_out_type &	right
	)

inline

int operator==	(	const dcache_in_type &	left,
		const dcache_in_type &	right
	)

inline

int operator==	(	const dcache_out_type &	left,
		const dcache_out_type &	right
	)

inline

void dvectorcache::power_model ( )

void ivectorcache::power_model ( )

void localram::power_model ( )

References localram::clockcycle, localram::dyn_read_energy, localram::dyn_read_energy_norm, localram::dyn_write_energy, localram::dyn_write_energy_norm, localram::int_power, localram::int_power_norm, localram::m_lrsize, localram::sta_power, and localram::sta_power_norm.

Referenced by localram::start_of_simulation().

void mmu::power_model ( )

Calculate power/energy values from normalized input data.

References mmu::clockcycle, mmu::dyn_dtlb_read_energy, mmu::dyn_dtlb_write_energy, mmu::dyn_itlb_read_energy, mmu::dyn_itlb_write_energy, mmu::dyn_tlb_read_energy_norm, mmu::dyn_tlb_write_energy_norm, mmu::int_power, mmu::int_power_norm, mmu::int_tlb_power_norm, mmu::m_dtlbnum, mmu::m_itlbnum, mmu::m_tlb_type, mmu::sta_power, mmu::sta_power_norm, and mmu::sta_tlb_power_norm.

Referenced by mmu::start_of_simulation().

uint8_t Leon3::read_byte	(	const unsigned int &	address,
		const unsigned int	asi,
		const unsigned int	flush,
		const unsigned int	lock
	)
throw	(
	)

virtual

Implements leon3_funclt_trap::MemoryInterface.

References v::debug, and flush().

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uint8_t Leon3::read_byte_dbg	(	const unsigned int &	address	)
throw	(
	)

virtual

Reimplemented from leon3_funclt_trap::MemoryInterface.

References v::debug.

void nocache::read_cache_entry	(	unsigned int	address,
		unsigned int *	data,
		sc_core::sc_time *	t
	)

virtual

read data cache entries/data (ASI 0xf)

forbidden read of cache entries

Implements cache_if.

References setup::name, and v::warn.

void vectorcache::read_cache_entry	(	unsigned int	address,
		unsigned int *	data,
		sc_core::sc_time *	t
	)

virtual

Read data cache entries/data (ASI 0xf)

cache_if::Read data cache entry/data (ASI 0xf)

Similar to instruction tag read, a data sub-block may be read by executing an LDA instruction with ASI = 0xD for instruction cache data and ASI = 0xF for data cache data. The sub-block to be read in the indexed cache line and set is selected by A[4:2].

Implements cache_if.

References vectorcache::clockcycle, t_cache_line::entry, vectorcache::get_idx(), vectorcache::get_tag(), t_cache_data::i, vectorcache::lookup_line(), vectorcache::m_offset_bits, and srDebug.

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void nocache::read_cache_tag	(	unsigned int	address,
		unsigned int *	data,
		sc_core::sc_time *	t
	)

virtual

read data cache tags (ASI 0xe)

forbidden read of cache tags

Implements cache_if.

References setup::name, and v::warn.

void vectorcache::read_cache_tag	(	unsigned int	address,
		unsigned int *	data,
		sc_core::sc_time *	t
	)

virtual

Read data cache tags (ASI 0xe)

cache_if::Read cache tags (ASI 0xe)

Diagnostic read of tags is possible by executing an LDA instruction with ASI = 0xC for instruction cache tags and ASI = 0xe for data cache tags. A cache line and way are indexed by the address bits making up the cache offset and the least significant bits of the address bits making up the address tag.

Implements cache_if.

References t_cache_tag::atag, vectorcache::clockcycle, vectorcache::get_idx(), vectorcache::get_tag(), t_cache_tag::lock, vectorcache::lookup_line(), t_cache_tag::lrr, srDebug, swap_Endianess(), t_cache_line::tag, and t_cache_tag::valid.

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unsigned int nocache::read_config_reg ( sc_core::sc_time * t )

virtual

read cache configuration register (ASI 0x2)

Implements cache_if.

References setup::name, and v::warn.

unsigned int vectorcache::read_config_reg ( sc_core::sc_time * t )

virtual

Read cache configuration register (ASI 0x2)

cache_if::Read cache configuration register

Implements cache_if.

References vectorcache::CACHE_CONFIG_REG, vectorcache::clockcycle, srDebug, and swap_Endianess().

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sc_dt::uint64 Leon3::read_dword	(	const unsigned int &	address,
		const unsigned int	asi,
		const unsigned int	flush,
		const unsigned int	lock
	)
throw	(
	)

virtual

Implements leon3_funclt_trap::MemoryInterface.

References v::debug, and flush().

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sc_dt::uint64 Leon3::read_dword_dbg	(	const unsigned int &	address	)
throw	(
	)

virtual

Reimplemented from leon3_funclt_trap::MemoryInterface.

References v::debug.

uint16_t Leon3::read_half	(	const unsigned int &	address,
		const unsigned int	asi,
		const unsigned int	flush,
		const unsigned int	lock
	)
throw	(
	)

virtual

Implements leon3_funclt_trap::MemoryInterface.

References v::debug, and flush().

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uint16_t Leon3::read_half_dbg	(	const unsigned int &	address	)
throw	(
	)

virtual

Reimplemented from leon3_funclt_trap::MemoryInterface.

References v::debug.

unsigned int Leon3::read_instr	(	const unsigned int &	address,
		const unsigned int	asi,
		const unsigned int	flush
	)
throw	(
	)

virtual

Implements leon3_funclt_trap::MemoryInterface.

References v::debug, flush(), and setup::name.

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unsigned int mmu::read_mcr ( )

virtual

Read mmu control register (ASI 0x19)

Implements mmu_if.

References v::debug, mmu::MMU_CONTROL_REG, setup::name, and swap_Endianess().

Referenced by mmu_cache_base::exec_data().

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unsigned int mmu::read_mctpr ( )

virtual

Read mmu context pointer register (ASI 0x19)

Implements mmu_if.

References v::debug, mmu::MMU_CONTEXT_TABLE_POINTER_REG, setup::name, and swap_Endianess().

Referenced by mmu_cache_base::exec_data().

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unsigned int mmu::read_mctxr ( )

virtual

Read mmu context register (ASI 0x19)

Implements mmu_if.

References v::debug, mmu::MMU_CONTEXT_REG, setup::name, and swap_Endianess().

Referenced by mmu_cache_base::exec_data().

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unsigned int mmu::read_mfar ( )

virtual

Read mmu fault address register (ASI 0x19)

Implements mmu_if.

References v::debug, mmu::MMU_FAULT_ADDRESS_REG, setup::name, and swap_Endianess().

Referenced by mmu_cache_base::exec_data().

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unsigned int mmu::read_mfsr ( )

virtual

Read mmu fault status register (ASI 0x19)

Implements mmu_if.

References v::debug, mmu::MMU_FAULT_STATUS_REG, setup::name, and swap_Endianess().

Referenced by mmu_cache_base::exec_data().

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uint32_t Leon3::read_word	(	const unsigned int &	address,
		const unsigned int	asi,
		const unsigned int	flush,
		const unsigned int	lock
	)
throw	(
	)

virtual

Implements leon3_funclt_trap::MemoryInterface.

References v::debug, flush(), and setup::name.

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uint32_t Leon3::read_word_dbg	(	const unsigned int &	address	)
throw	(
	)

virtual

Reimplemented from leon3_funclt_trap::MemoryInterface.

References v::debug.

unsigned int vectorcache::replacement_selector	(	unsigned int	idx,
		unsigned int	mode
	)

protected

Returns number of the way to be refilled - depending on replacement strategy.

Selects way to be refilled depending on replacement strategy

References vectorcache::lookup_line(), vectorcache::m_max_lru, vectorcache::m_pseudo_rand, vectorcache::m_sets, and srDebug.

Referenced by vectorcache::allocate_line().

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Leon3::SC_HAS_PROCESS ( Leon3 )

void sc_trace	(	sc_trace_file *	,
		const cctrltype &	,
		const std::string &
	)

inline

void sc_trace	(	sc_trace_file *	,
		const icdiag_in_type &	,
		const std::string &
	)

inline

void sc_trace	(	sc_trace_file *	,
		const icache_in_type &	,
		const std::string &
	)

inline

void sc_trace	(	sc_trace_file *	,
		const icache_out_type &	,
		const std::string &
	)

inline

void sc_trace	(	sc_trace_file *	,
		const dcache_in_type &	,
		const std::string &
	)

inline

void sc_trace	(	sc_trace_file *	,
		const dcache_out_type &	,
		const std::string &
	)

inline

void nocache::snoop_invalidate	(	const t_snoop &	snoop,
		const sc_core::sc_time &	delay
	)

virtual

dummy snooping function

Implements cache_if.

References setup::name, and v::warn.

void vectorcache::snoop_invalidate	(	const t_snoop &	snoop,
		const sc_core::sc_time &	delay
	)

virtual

Snooping function (invalidates cache line(s))

Snooping function (invalidates cache lines)

Implements cache_if.

References t_snoop::address, vectorcache::check_mode(), vectorcache::get_idx(), vectorcache::get_offset(), vectorcache::get_tag(), t_snoop::length, vectorcache::lookup_line(), vectorcache::m_new_linefetch_en, vectorcache::m_sets, offset, and vectorcache::offset2valid().

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Leon3::SR_HAS_SIGNALS ( Leon3 )

gs::cnf::callback_return_type dvectorcache::sta_power_cb	(	gs::gs_param_base &	changed_param,
		gs::cnf::callback_type	reason
	)

Static power callback.

References GC_RETURN_OK.

gs::cnf::callback_return_type ivectorcache::sta_power_cb	(	gs::gs_param_base &	changed_param,
		gs::cnf::callback_type	reason
	)

Static power callback.

References GC_RETURN_OK.

gs::cnf::callback_return_type localram::sta_power_cb	(	gs::gs_param_base &	changed_param,
		gs::cnf::callback_type	reason
	)

Static power callback.

References GC_RETURN_OK.

Referenced by localram::localram().

gs::cnf::callback_return_type mmu::sta_power_cb	(	gs::gs_param_base &	changed_param,
		gs::cnf::callback_type	reason
	)

Static power callback.

References GC_RETURN_OK.

Referenced by mmu::mmu().

void dvectorcache::start_of_simulation ( )

Automatically called at start of simulation.

References vectorcache::m_pow_mon, and dvectorcache::power_model().

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void ivectorcache::start_of_simulation ( )

References vectorcache::m_pow_mon, and ivectorcache::power_model().

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void localram::start_of_simulation ( )

Automatically called at the beginning of the simulation.

References localram::m_pow_mon, and localram::power_model().

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void mmu::start_of_simulation ( )

Automatically started at beginning of simulation.

References mmu::m_pow_mon, and mmu::power_model().

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gs::cnf::callback_return_type dvectorcache::swi_power_cb	(	gs::gs_param_base &	changed_param,
		gs::cnf::callback_type	reason
	)

Dynamic/Switching power callback.

References dvectorcache::dyn_data_read_energy, vectorcache::dyn_data_reads, dvectorcache::dyn_data_write_energy, vectorcache::dyn_data_writes, dvectorcache::dyn_tag_read_energy, vectorcache::dyn_tag_reads, dvectorcache::dyn_tag_write_energy, vectorcache::dyn_tag_writes, GC_RETURN_OK, dvectorcache::power_frame_starting_time, and dvectorcache::swi_power.

gs::cnf::callback_return_type ivectorcache::swi_power_cb	(	gs::gs_param_base &	changed_param,
		gs::cnf::callback_type	reason
	)

Dynamic/Switching power callback.

References ivectorcache::dyn_data_read_energy, vectorcache::dyn_data_reads, ivectorcache::dyn_data_write_energy, vectorcache::dyn_data_writes, ivectorcache::dyn_tag_read_energy, vectorcache::dyn_tag_reads, ivectorcache::dyn_tag_write_energy, vectorcache::dyn_tag_writes, GC_RETURN_OK, ivectorcache::power_frame_starting_time, and ivectorcache::swi_power.

gs::cnf::callback_return_type localram::swi_power_cb	(	gs::gs_param_base &	changed_param,
		gs::cnf::callback_type	reason
	)

Dynamic/Switching power callback.

References localram::dyn_read_energy, localram::dyn_reads, localram::dyn_write_energy, localram::dyn_writes, GC_RETURN_OK, localram::power_frame_starting_time, and localram::swi_power.

Referenced by localram::localram().

gs::cnf::callback_return_type mmu::swi_power_cb	(	gs::gs_param_base &	changed_param,
		gs::cnf::callback_type	reason
	)

Dynamic/Switching power callback.

References mmu::dyn_dtlb_read_energy, mmu::dyn_dtlb_reads, mmu::dyn_dtlb_write_energy, mmu::dyn_dtlb_writes, mmu::dyn_itlb_read_energy, mmu::dyn_itlb_reads, mmu::dyn_itlb_write_energy, mmu::dyn_itlb_writes, GC_RETURN_OK, mmu::power_frame_starting_time, and mmu::swi_power.

Referenced by mmu::mmu().

void mmu::tlb_flush ( )

TLB flush complete.

References v::debug, mmu::dtlb, mmu::itlb, and setup::name.

Referenced by mmu_cache_base::exec_data().

void mmu::tlb_flush ( uint32_t vpn )

TLB flush certain entry.

References v::debug, mmu::dtlb, mmu::itlb, and setup::name.

signed mmu::tlb_lookup	(	unsigned int	addr,
		unsigned	asi,
		std::map< t_VAT, t_PTE_context > *	tlb,
		unsigned int	tlb_size,
		sc_core::sc_time *	t,
		unsigned int *	debug,
		bool	is_dbg,
		bool &	cacheable,
		unsigned	is_write,
		uint64_t *	paddr
	)

virtual

Page descriptor cache (PDC) lookup.

Implements mmu_if.

References t_PTE_context::context, DATA_ACCESS_EXC, v::debug, mmu::dyn_dtlb_writes, mmu::dyn_itlb_writes, v::error, error_code, INSTR_ACCESS_EXC, mmu::itlb, t_PTE_context::lru, mmu::m_mmu_cache, mmu::m_pow_mon, mmu::m_vtag_width, mmu::MMU_CONTEXT_REG, mmu::MMU_CONTROL_REG, mmu::MMU_FAULT_ADDRESS_REG, mmu::MMU_FAULT_STATUS_REG, setup::name, t_PTE_context::page_size, t_PTE_context::pte, t_PTE_context::tlb_no, mmu::tlb_remove(), mmu_cache_if::trigger_exception(), and v::uint32.

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unsigned int mmu::tlb_remove	(	std::map< t_VAT, t_PTE_context > *	tlb,
		unsigned int	tlb_size
	)

Selects a TLB entry for replacement (LRU or RANDOM replacement). Removes the selected entry from the TLB map and returns the 'number' of the TLB (which is now free).

References count, v::debug, mmu::m_pseudo_rand, mmu::m_tlb_rep, and setup::name.

Referenced by mmu::tlb_lookup().

void Leon3::trigger_exception ( unsigned int exception )

virtual

Sent an exception to the CPU.

Implements mmu_cache_base.

References Leon3::cpu, v::info, setup::name, and leon3_funclt_trap::Processor_leon3_funclt::triggerException().

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void Leon3::unlock ( )

virtual

Implements leon3_funclt_trap::MemoryInterface.

int vectorcache::update_line	(	unsigned const	tag,
		unsigned const	idx,
		unsigned const	offset,
		unsigned const	way,
		unsigned const	len,
		unsigned char *const	data,
		sc_core::sc_time *	delay,
		unsigned *	debug,
		bool &	cacheable,
		bool	is_dbg
	)

protected

Allocates a cache line in a given way. Updates timing and power information. Returns the allocated way (should be same as parameter), otherwise -1.

Allocates a cache line in a given cache way.

References t_cache_tag::atag, vectorcache::clockcycle, vectorcache::dyn_data_writes, vectorcache::dyn_tag_writes, t_cache_line::entry, vectorcache::lookup_line(), vectorcache::lrr_update(), vectorcache::lru_update(), vectorcache::m_new_linefetch_en, vectorcache::m_pow_mon, vectorcache::m_repl, offset, vectorcache::offset2valid(), srDebug, t_cache_line::tag, and t_cache_tag::valid.

Referenced by vectorcache::allocate_line(), vectorcache::mem_read(), and vectorcache::mem_write().

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vectorcache::vectorcache	(	ModuleName	name,
		mmu_cache_if *	_mmu_cache,
		mem_if *	_tlb_adaptor,
		unsigned int	mmu_en,
		unsigned int	burst_en,
		bool	new_linefetch_en,
		unsigned int	sets,
		unsigned int	setsize,
		unsigned int	setlock,
		unsigned int	linesize,
		unsigned int	repl,
		unsigned int	lram,
		unsigned int	lramstart,
		unsigned int	lramsize,
		bool	pow_mon
	)

protected

Constructor of data cache.

Parameters

_mmu_cache	SystemC module name
_tlb_adaptor	Pointer to top-level class of cache subsystem (mmu_cache) for access to AHB bus interface
mmu_en	Pointer to memory management unit
burst_en	Memory management unit enabled
new_linefetch_en	Allows the cache to be switched in burst fetch mode (by CCR setting)
sets	>
setsize	Number of cache ways
setlock	Size of a cache way (in kbytes)
linesize	>
repl	Size of a cache line (in words)
lram	Cache replacement strategy
lramstart	Local RAM configured
lramsize	The 8 MSBs of the local ram start address (16MB segment)
pow_mon	Size of local ram (size in kbyte = 2^lramsize)

References vectorcache::bypassops, vectorcache::CACHE_CONFIG_REG, vectorcache::cache_mem, i, v::info, vectorcache::m_api, vectorcache::m_bytesperline, vectorcache::m_idx_bits, vectorcache::m_linesize, vectorcache::m_lram, vectorcache::m_lramsize, vectorcache::m_lramstart, vectorcache::m_max_lru, vectorcache::m_mmu_en, vectorcache::m_number_of_vectors, vectorcache::m_offset_bits, vectorcache::m_repl, vectorcache::m_setlock, vectorcache::m_sets, vectorcache::m_setsize, vectorcache::m_tag_bits, setup::name, vectorcache::rhits, vectorcache::rmisses, srDebug, srError, vectorcache::whits, and vectorcache::wmisses.

void Leon3::write_byte	(	const unsigned int &	address,
		unsigned char	datum,
		const unsigned int	asi,
		const unsigned int	flush,
		const unsigned int	lock
	)
throw	(
	)

virtual

Implements leon3_funclt_trap::MemoryInterface.

References v::debug, and flush().

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void Leon3::write_byte_dbg	(	const unsigned int &	address,
		unsigned char	datum
	)
throw	(
	)

virtual

Reimplemented from leon3_funclt_trap::MemoryInterface.

References v::debug.

void nocache::write_cache_entry	(	unsigned int	address,
		unsigned int *	data,
		sc_core::sc_time *	t
	)

virtual

write data cache entries/data (ASI 0xf)

forbidden write of cache entries

Implements cache_if.

References setup::name, and v::warn.

void vectorcache::write_cache_entry	(	unsigned int	address,
		unsigned int *	data,
		sc_core::sc_time *	t
	)

virtual

Write data cache entries/data (ASI 0xf)

cache_if::Write data cache entry/data (ASI 0xd)

A data sub-block can be directly written by executing a STA instruction with ASI = 0xD for the instruction cache data and ASI = 0xF for the data cache data. The sub-block to be read in indexed cache line and set is selected by A[4:2].

Implements cache_if.

References vectorcache::clockcycle, t_cache_line::entry, vectorcache::get_idx(), vectorcache::get_tag(), t_cache_data::i, vectorcache::lookup_line(), vectorcache::m_offset_bits, and srDebug.

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void nocache::write_cache_tag	(	unsigned int	address,
		unsigned int *	data,
		sc_core::sc_time *	t
	)

virtual

write data cache tags (ASI 0xe)

forbidden write of cache tags

Implements cache_if.

References setup::name, and v::warn.

void vectorcache::write_cache_tag	(	unsigned int	address,
		unsigned int *	data,
		sc_core::sc_time *	t
	)

virtual

Write data cache tags (ASI 0xe)

cache_if::Write data cache tags (ASI 0xe)

The tags can be directly written by executing a STA instruction with ASI = 0xC for the instruction cache tags and ASI = 0xE for the data cache tags. The cache line and set are indexed by the address bits making up the cache offset and the least significant bits of the address bits making up the address tag. D[31:10] is written into the ATAG field and the valid bits are written with the D[7:0] of the write data. Bit D[9] is written into the LRR bit (if enabled) and D[8] is written into the lock bit (if enabled).

Implements cache_if.

References t_cache_tag::atag, vectorcache::clockcycle, vectorcache::get_idx(), vectorcache::get_tag(), t_cache_tag::lock, vectorcache::lookup_line(), t_cache_tag::lrr, vectorcache::m_setlock, vectorcache::m_sets, srDebug, swap_Endianess(), t_cache_line::tag, and t_cache_tag::valid.

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void Leon3::write_dword	(	const unsigned int &	address,
		sc_dt::uint64	datum,
		const unsigned int	asi,
		const unsigned int	flush,
		const unsigned int	lock
	)
throw	(
	)

virtual

Implements leon3_funclt_trap::MemoryInterface.

References v::debug, and flush().

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void Leon3::write_dword_dbg	(	const unsigned int &	address,
		sc_dt::uint64	datum
	)
throw	(
	)

virtual

Reimplemented from leon3_funclt_trap::MemoryInterface.

References v::debug.

void Leon3::write_half	(	const unsigned int &	address,
		unsigned short int	datum,
		const unsigned int	asi,
		const unsigned int	flush,
		const unsigned int	lock
	)
throw	(
	)

virtual

Implements leon3_funclt_trap::MemoryInterface.

References v::debug, and flush().

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void Leon3::write_half_dbg	(	const unsigned int &	address,
		unsigned short int	datum
	)
throw	(
	)

virtual

Reimplemented from leon3_funclt_trap::MemoryInterface.

References v::debug.

void mmu::write_mcr ( unsigned int * data )

virtual

Write mmu control register (ASI 0x19)

Implements mmu_if.

References v::debug, mmu::MMU_CONTROL_REG, setup::name, and swap_Endianess().

Referenced by mmu_cache_base::exec_data().

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void mmu::write_mctpr ( unsigned int * data )

virtual

Write mmu context pointer register (ASI 0x19)

Implements mmu_if.

References v::debug, mmu::MMU_CONTEXT_TABLE_POINTER_REG, setup::name, and swap_Endianess().

Referenced by mmu_cache_base::exec_data().

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void mmu::write_mctxr ( unsigned int * data )

virtual

Write mmu context register (ASI 0x19)

Implements mmu_if.

References v::debug, mmu::MMU_CONTEXT_REG, setup::name, and swap_Endianess().

Referenced by mmu_cache_base::exec_data().

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void Leon3::write_word	(	const unsigned int &	address,
		unsigned int	datum,
		const unsigned int	asi,
		const unsigned int	flush,
		const unsigned int	lock
	)
throw	(
	)