Mmu_cache_base

Files
file	mmu_cache_base.cpp

Functions
	mmu_cache_base::mmu_cache_base (ModuleName name="", bool icen=true, uint32_t irepl=1, uint32_t isets=4, uint32_t ilinesize=8, uint32_t isetsize=8, uint32_t isetlock=true, uint32_t dcen=true, uint32_t drepl=1, uint32_t dsets=2, uint32_t dlinesize=4, uint32_t dsetsize=8, bool dsetlock=true, bool dsnoop=true, bool ilram=false, uint32_t ilramsize=0x000, uint32_t ilramstart=0x000, uint32_t dlram=false, uint32_t dlramsize=0x000, uint32_t dlramstart=0x000, uint32_t cached=0, bool mmu_en=true, uint32_t itlb_num=8, uint32_t dtlb_num=8, uint32_t tlb_type=0, uint32_t tlb_rep=1, uint32_t mmupgsz=0, uint32_t hindex=0, bool pow_mon=false, AbstractionLayer ambaLayer=amba::amba_LT)
	Constructor of the top-level class of the memory sub-system (caches and mmu). More...
	mmu_cache_base::~mmu_cache_base ()
void	mmu_cache_base::dorst ()
	Reset function. More...
virtual void	mmu_cache_base::exec_instr (const unsigned int &addr, unsigned char *ptr, unsigned int asi, unsigned int *debug, const unsigned int &flush, sc_core::sc_time &delay, bool is_dbg)
	Instruction interface to functional part of the model. More...
virtual void	mmu_cache_base::exec_data (const tlm::tlm_command cmd, const unsigned int &addr, unsigned char *ptr, unsigned int len, unsigned int asi, unsigned int *debug, unsigned int flush, unsigned int lock, sc_core::sc_time &delay, bool is_dbg, tlm::tlm_response_status &response)
	Data interface to functional part of the model. More...
virtual void	mmu_cache_base::response_callback (tlm::tlm_generic_payload *trans)
	Called from AHB master to signal begin response. More...
virtual void	mmu_cache_base::mem_write (unsigned int addr, unsigned int asi, unsigned char *data, unsigned int length, sc_core::sc_time *t, unsigned int *debug, bool is_dbg, bool &cacheable, bool is_lock)
	MemIF implementation - writes data to AHB master. More...
virtual bool	mmu_cache_base::mem_read (unsigned int addr, unsigned int asi, unsigned char *data, unsigned int length, sc_core::sc_time *t, unsigned int *debug, bool is_dbg, bool &cacheable, bool is_lock)
	MemIF implementation - reads data from AHB master. More...
void	mmu_cache_base::mem_access ()
virtual void	mmu_cache_base::set_irq (uint32_t tt)
	Send an interrupt over the central IRQ interface. More...
void	mmu_cache_base::write_ccr (unsigned char *data, unsigned int len, sc_core::sc_time *delay, unsigned int *debug, bool is_dbg)
	Writes the cache control register. More...
virtual unsigned int	mmu_cache_base::read_ccr (bool internal)
	Read the cache control register. More...
void	mmu_cache_base::snoopingCallBack (const t_snoop &snoop, const sc_core::sc_time &delay)
	Snooping function (For calling dcache->snoop_invalidate) More...
void	mmu_cache_base::start_of_simulation ()
	Automatically called at the beginning of the simulation. More...
void	mmu_cache_base::power_model ()
	Calculate power/energy values from normalized input data. More...
gs::cnf::callback_return_type	mmu_cache_base::sta_power_cb (gs::gs_param_base &changed_param, gs::cnf::callback_type reason)
	Static power callback. More...
gs::cnf::callback_return_type	mmu_cache_base::int_power_cb (gs::gs_param_base &changed_param, gs::cnf::callback_type reason)
	Dynamic/Internal power callback. More...
gs::cnf::callback_return_type	mmu_cache_base::swi_power_cb (gs::gs_param_base &changed_param, gs::cnf::callback_type reason)
	Dynamic/Switching power callback. More...
void	mmu_cache_base::end_of_simulation ()
	Called at end of simulation to print execution statistics. More...
sc_core::sc_time	mmu_cache_base::get_clock ()
	Return clock period (for ahb interface) More...
void	mmu_cache_base::clkcng ()
	Deal with clock changes. More...

Detailed Description

Function Documentation

void mmu_cache_base::clkcng ( )

virtual

Deal with clock changes.

Reimplemented from CLKDevice.

References localram::clkcng(), cache_if::clkcng(), mmu::clkcng(), CLKDevice::clock_cycle, dcache, dlocalram, icache, ilocalram, m_dcen, m_icen, m_mmu, and m_mmu_en.

Referenced by Leon3::clkcng().

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void mmu_cache_base::dorst ( )

virtual

Reset function.

Reimplemented from CLKDevice.

void mmu_cache_base::end_of_simulation

(

)

Called at end of simulation to print execution statistics.

References m_right_transactions, m_total_transactions, setup::name, AHBMaster<>::print_transport_statistics(), and v::report.

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void mmu_cache_base::exec_data ( const tlm::tlm_command  cmd, const unsigned int &  addr, unsigned char *  ptr, unsigned int  len, unsigned int  asi, unsigned int *  debug, unsigned int  flush, unsigned int  lock, sc_core::sc_time &  delay, bool  is_dbg, tlm::tlm_response_status &  response  )

virtual

Data interface to functional part of the model.

References __PRETTY_FUNCTION__, CLKDevice::clock_cycle, cache_if::dbg_out(), dcache, v::debug, mmu::diag_read_dctlb(), mmu::diag_read_itlb(), mmu::diag_write_dctlb(), mmu::diag_write_itlb(), dlocalram, cache_if::flush(), icache, ilocalram, m_dlram, m_dlramstart, m_ilram, m_ilramstart, m_mmu, m_mmu_en, mem_if::mem_read(), localram::mem_read(), mem_read(), mem_if::mem_write(), localram::mem_write(), mem_write(), setup::name, cache_if::read_cache_entry(), cache_if::read_cache_tag(), read_ccr(), cache_if::read_config_reg(), mmu::read_mcr(), mmu::read_mctpr(), mmu::read_mctxr(), mmu::read_mfar(), mmu::read_mfsr(), srDebug, srError, srWarn, mmu::tlb_flush(), cache_if::write_cache_entry(), cache_if::write_cache_tag(), write_ccr(), mmu::write_mcr(), mmu::write_mctpr(), and mmu::write_mctxr().

Referenced by mmu_cache::exec_data().

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void mmu_cache_base::exec_instr ( const unsigned int &  addr, unsigned char *  ptr, unsigned int  asi, unsigned int *  debug, const unsigned int &  flush, sc_core::sc_time &  delay, bool  is_dbg  )

virtual

Instruction interface to functional part of the model.

References __PRETTY_FUNCTION__, flush(), icache, ilocalram, m_ilram, m_ilramstart, mem_if::mem_read(), localram::mem_read(), and srDebug.

Referenced by mmu_cache::exec_instr().

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sc_core::sc_time mmu_cache_base::get_clock ( )

virtual

Return clock period (for ahb interface)

Implements AHBMaster<>.

References CLKDevice::clock_cycle.

gs::cnf::callback_return_type mmu_cache_base::int_power_cb	(	gs::gs_param_base &	changed_param,
		gs::cnf::callback_type	reason
	)

Dynamic/Internal power callback.

References GC_RETURN_OK.

Referenced by mmu_cache_base().

void mmu_cache_base::mem_access ( )

protected

References ahb_response_event, AHBMaster<>::ahbaccess(), bus_in_fifo, bus_read_completed, m_abstractionLayer, srDebug, trans, and pysc::api::systemc::wait().

Referenced by mmu_cache_base().

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bool mmu_cache_base::mem_read ( unsigned int  addr, unsigned int  asi, unsigned char *  data, unsigned int  length, sc_core::sc_time *  t, unsigned int *  debug, bool  is_dbg, bool &  cacheable, bool  is_lock  )

virtual

MemIF implementation - reads data from AHB master.

Reimplemented from mem_if.

References AHBMaster<>::ahb, AHBMaster<>::ahbaccess_dbg(), bus_in_fifo, bus_read_completed, m_cached, srDebug, trans, and pysc::api::systemc::wait().

Referenced by exec_data().

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void mmu_cache_base::mem_write ( unsigned int  addr, unsigned int  asi, unsigned char *  data, unsigned int  length, sc_core::sc_time *  t, unsigned int *  debug, bool  is_dbg, bool &  cacheable, bool  is_lock  )

virtual

MemIF implementation - writes data to AHB master.

Function for write access to AHB master socket.

Reimplemented from mem_if.

References AHBMaster<>::ahb, AHBMaster<>::ahbaccess_dbg(), bus_in_fifo, srDebug, trans, pysc::api::systemc::wait(), wb_pointer, and write_buf.

Referenced by exec_data().

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mmu_cache_base::mmu_cache_base	(	ModuleName	name = "",
		bool	icen = true,
		uint32_t	irepl = 1,
		uint32_t	isets = 4,
		uint32_t	ilinesize = 8,
		uint32_t	isetsize = 8,
		uint32_t	isetlock = true,
		uint32_t	dcen = true,
		uint32_t	drepl = 1,
		uint32_t	dsets = 2,
		uint32_t	dlinesize = 4,
		uint32_t	dsetsize = 8,
		bool	dsetlock = true,
		bool	dsnoop = true,
		bool	ilram = false,
		uint32_t	ilramsize = 0x000,
		uint32_t	ilramstart = 0x000,
		uint32_t	dlram = false,
		uint32_t	dlramsize = 0x000,
		uint32_t	dlramstart = 0x000,
		uint32_t	cached = 0,
		bool	mmu_en = true,
		uint32_t	itlb_num = 8,
		uint32_t	dtlb_num = 8,
		uint32_t	tlb_type = 0,
		uint32_t	tlb_rep = 1,
		uint32_t	mmupgsz = 0,
		uint32_t	hindex = 0,
		bool	pow_mon = false,
		AbstractionLayer	ambaLayer = amba::amba_LT
	)

Constructor of the top-level class of the memory sub-system (caches and mmu).

Constructor.

Select LT or AT abstraction

Parameters

name	SystemC module name
icen	instruction cache enable
irepl	instruction cache replacement strategy
isets	number of instruction cache sets
ilinesize	instruction cache line size (in bytes)
isetsize	size of an instruction cache set (in kbytes)
isetlock	enable instruction cache locking
dcen	data cache enable
drepl	data cache replacement strategy
dsets	number of data cache sets
dlinesize	data cache line size (in bytes)
dsetsize	size of a data cache set (in kbytes)
dsetlock	enable data cache locking
dsnoop	enable data cache snooping
ilram	enable instruction scratch pad
ilramsize	size of the instruction scratch pad (in kbytes)
ilramstart	start address of the instruction scratch pad
dlram	enable data scratch pad
dlramsize	size of the data scratch pad (in kbytes)
dlramstart	start address of the data scratch pad
cached	fixed cacheability mask
mmu_en	mmu enable
itlb_num	number of instruction TLBs
dtlb_num	number of data TLBs
tlb_type	split or shared instruction and data TLBs
tlb_rep	TLB replacement strategy
mmupgsz	MMU page size
hindex	ID of the bus master
pow_mon	Enable power monitoring

References CACHE_CONTROL_REG, dcache, dlocalram, mmu::get_dtlb_if(), mmu::get_itlb_if(), globl_count, icache, ilocalram, int_power, int_power_cb(), m_cached, m_mmu, m_pow_mon, mem_access(), usi.cci.callback::pre_read, srInfo, sta_power, sta_power_cb(), swi_power, swi_power_cb(), and wb_pointer.

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void mmu_cache_base::power_model

(

)

Calculate power/energy values from normalized input data.

References CLKDevice::clock_cycle, dyn_read_energy, dyn_read_energy_norm, dyn_write_energy, dyn_write_energy_norm, int_power, int_power_norm, sta_power, and sta_power_norm.

Referenced by start_of_simulation().

unsigned int mmu_cache_base::read_ccr ( bool  internal )

virtual

Read the cache control register.

Reimplemented from mmu_cache_if.

References __PRETTY_FUNCTION__, CACHE_CONTROL_REG, srDebug, and swap_Endianess().

Referenced by exec_data().

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void mmu_cache_base::response_callback ( tlm::tlm_generic_payload *  trans )

virtual

Called from AHB master to signal begin response.

Reimplemented from AHBMaster<>.

References ahb_response_event, and srWarn.

void mmu_cache_base::set_irq ( uint32_t  tt )

virtual

Send an interrupt over the central IRQ interface.

Reimplemented from mmu_cache_if.

References irq.

void mmu_cache_base::snoopingCallBack	(	const t_snoop &	snoop,
		const sc_core::sc_time &	delay
	)

Snooping function (For calling dcache->snoop_invalidate)

References __PRETTY_FUNCTION__, t_snoop::address, dcache, t_snoop::length, m_dcen, m_dsnoop, m_master_id, t_snoop::master_id, cache_if::snoop_invalidate(), and srDebug.

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gs::cnf::callback_return_type mmu_cache_base::sta_power_cb	(	gs::gs_param_base &	changed_param,
		gs::cnf::callback_type	reason
	)

Static power callback.

References GC_RETURN_OK.

Referenced by mmu_cache_base().

void mmu_cache_base::start_of_simulation

(

)

Automatically called at the beginning of the simulation.

References m_pow_mon, and power_model().

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gs::cnf::callback_return_type mmu_cache_base::swi_power_cb	(	gs::gs_param_base &	changed_param,
		gs::cnf::callback_type	reason
	)

Dynamic/Switching power callback.

References dyn_read_energy, dyn_reads, dyn_write_energy, dyn_writes, GC_RETURN_OK, power_frame_starting_time, and swi_power.

Referenced by mmu_cache_base().

void mmu_cache_base::write_ccr ( unsigned char *  data, unsigned int  len, sc_core::sc_time *  delay, unsigned int *  debug, bool  is_dbg  )

virtual

Writes the cache control register.

Reimplemented from mmu_cache_if.

References __PRETTY_FUNCTION__, CACHE_CONTROL_REG, dcache, cache_if::flush(), icache, srDebug, and swap_Endianess().

Referenced by exec_data().

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mmu_cache_base::~mmu_cache_base

(

)