SoCRocket
Transaction-Level Modeling Framework for Space Applications
#include "testmod.h"Classes | |
| struct | i2cmstregs |
Macros | |
| #define | CTR_EN (1 << 7) /* Enable core */ |
| #define | CTR_IEN (1 << 6) /* Interrupt enable */ |
| #define | CR_STA (1 << 7) /* Generate start condition */ |
| #define | CR_STO (1 << 6) /* Generate stop condition */ |
| #define | CR_RD (1 << 5) /* Read from slave */ |
| #define | CR_WR (1 << 4) /* Write to slave */ |
| #define | CR_ACK |
| #define | CR_IACK (1 << 0) /* Interrupt acknowledge */ |
| #define | SR_RXACK (1 << 7) /* Receibed acknowledge from slave */ |
| #define | SR_BUSY (1 << 6) /* I2C bus busy */ |
| #define | SR_AL (1 << 5) /* Arbitration lost */ |
| #define | SR_TIP (1 << 1) /* Transfer in progress */ |
| #define | SR_IF (1 << 0) /* Interrupt flag */ |
| #define | PRER_RESVAL 0xffff |
| #define | CTR_RESVAL 0 |
| #define | RXR_RESVAL 0 |
| #define | SR_RESVAL 0 |
| #define | PRESCALER 0x0003 |
| #define | I2CMEM_ADDR 0x50 |
| #define | TEST_DATA 0x55 |
Functions | |
| int | i2cmst_test (int addr) |
| #define CR_ACK |
Referenced by i2cmst_test().
| #define CR_IACK (1 << 0) /* Interrupt acknowledge */ |
| #define CR_RD (1 << 5) /* Read from slave */ |
Referenced by i2cmst_test().
| #define CR_STA (1 << 7) /* Generate start condition */ |
Referenced by i2cmst_test().
| #define CR_STO (1 << 6) /* Generate stop condition */ |
Referenced by i2cmst_test().
| #define CR_WR (1 << 4) /* Write to slave */ |
Referenced by i2cmst_test().
| #define CTR_EN (1 << 7) /* Enable core */ |
Referenced by i2cmst_test().
| #define CTR_IEN (1 << 6) /* Interrupt enable */ |
| #define CTR_RESVAL 0 |
Referenced by i2cmst_test().
| #define I2CMEM_ADDR 0x50 |
Referenced by i2cmst_test().
| #define PRER_RESVAL 0xffff |
Referenced by i2cmst_test().
| #define PRESCALER 0x0003 |
Referenced by i2cmst_test().
| #define RXR_RESVAL 0 |
Referenced by i2cmst_test().
| #define SR_AL (1 << 5) /* Arbitration lost */ |
Referenced by i2cmst_test().
| #define SR_BUSY (1 << 6) /* I2C bus busy */ |
| #define SR_IF (1 << 0) /* Interrupt flag */ |
| #define SR_RESVAL 0 |
Referenced by i2cmst_test().
| #define SR_RXACK (1 << 7) /* Receibed acknowledge from slave */ |
Referenced by i2cmst_test().
| #define SR_TIP (1 << 1) /* Transfer in progress */ |
Referenced by i2cmst_test().
| #define TEST_DATA 0x55 |
Referenced by i2cmst_test().
References CR_ACK, CR_RD, CR_STA, CR_STO, CR_WR, i2cmstregs::csr, i2cmstregs::ctr, CTR_EN, CTR_RESVAL, fail, i, I2CMEM_ADDR, i2cmstregs::prer, PRER_RESVAL, PRESCALER, report_device(), report_subtest(), RXR_RESVAL, SR_AL, SR_RESVAL, SR_RXACK, SR_TIP, TEST_DATA, and i2cmstregs::xr.