- m -

m : filter , MDRModelIterator
m_abstractionLayer : mmu_cache_base
m_ambaLayer : AHBMaster< BASE >
m_api : BaseModule< BASE > , localram , MemoryPower , mmu , vectorcache
m_associate_busports : sc_register_bank_base
m_backend : APBUART
m_burst_en : vectorcache
m_bytesperline : vectorcache
m_cached : mmu_cache_base
m_counters : BaseModule< BASE >
m_cur_val : sc_register_b< T >
m_current_PTE_context : mmu
m_dcen : mmu_cache_base
m_default_entry : localram
m_desc : sc_register_base , sc_register_field_base , sc_rf_valuecode
m_dlram : mmu_cache_base
m_dlramstart : mmu_cache_base
m_dsnoop : mmu_cache_base
m_dtlblog2 : mmu
m_dtlbnum : mmu
m_EndRequestEvent : AHBMaster< BASE >
m_exram : powermonitor
m_fields : sc_register_b< T >
m_generics : BaseModule< BASE >
m_highpos : sr_register_field< T >
m_hit_read_response_delay : vectorcache
m_icen : mmu_cache_base
m_idx1 : mmu
m_idx2 : mmu
m_idx3 : mmu
m_idx_bits : vectorcache
m_ilram : mmu_cache_base
m_ilramstart : mmu_cache_base
m_intrinsics : Leon3
m_itlblog2 : mmu
m_itlbnum : mmu
m_linesize : vectorcache
m_lowpos : sr_register_field< T >
m_lram : vectorcache
m_lramsize : vectorcache
m_lramstart : vectorcache
m_lrsize : localram
m_lrstart : localram
m_manager : PlatformIntrinsic< wordSize >
m_mask : sc_register_b< T > , sc_register_field< T, lowpos, highpos > , sr_register_field< T >
m_master_id : mmu_cache_base
m_max_lru : vectorcache
m_mirror_param : sr_param_t< T >
m_mirror_val : sr_param_t< T >
m_miss_read_response_delay : vectorcache
m_mmu : mmu_cache_base , tlb_adaptor
m_mmu_cache : mmu , tlb_adaptor , vectorcache
m_mmu_en : mmu_cache_base , vectorcache
m_mmupgsz : mmu
m_mnemonic : sc_rf_valuecode
m_name : sc_register_field_base
m_new_linefetch_en : vectorcache
m_number_of_vectors : vectorcache
m_offset_bits : vectorcache
m_performance_counters : localram , MemoryPower , mmu , vectorcache
m_pirq : GPCounter
m_pow_mon : leon3_funclt_trap::Processor_leon3_funclt , localram , MemoryPower , mmu , mmu_cache_base , vectorcache
m_power : BaseModule< BASE >
m_probe_event : sc_register_b< T >
m_processor : PlatformIntrinsic< wordSize >
m_pseudo_rand : mmu , vectorcache
m_reads : AHBMaster< BASE > , AHBSlave< BASE > , Memory
m_receiver : sr_signal::signal_out< TYPE, MODULE >
m_reg : sc_register_field_b< T >
m_register : AHBDevice< BASE > , APBDevice< BASE > , sr_register_amba_socket< BUSWIDTH, ADDR_TYPE, DATA_TYPE > , sr_register_bank< ADDR_TYPE, DATA_TYPE >
m_registers : sr_register_bank< ADDR_TYPE, DATA_TYPE >
m_repl : vectorcache
m_report_time : powermonitor
m_RequestPEQ : AHBSlave< BASE >
m_reset_val : sc_register_b< T >
m_ResponsePEQ : AHBMaster< BASE > , AHBSlave< BASE >
m_right_transactions : mmu_cache_base
m_setlock : vectorcache
m_sets : vectorcache
m_setsize : vectorcache
m_size : sc_register_bank_base
m_storage : BaseMemory
m_tag_bits : vectorcache
m_tlb : tlb_adaptor
m_tlb_adaptor : vectorcache
m_tlb_rep : mmu
m_tlb_type : mmu
m_tlbnum : tlb_adaptor
m_total_transactions : mmu_cache_base
m_value : sr_signal::signal_if< TYPE >
m_value_encoding_map : sc_register_field_b< T >
m_vtag_width : mmu
m_wordsperline : vectorcache
m_write_response_delay : vectorcache
m_writes : AHBMaster< BASE > , AHBSlave< BASE > , Memory
maddress : dcache_in_type
mask : BAR , brm_irq_reg , irq_reg , spictrlregs
MASK_DEFAULT : Irqmp
master_id : t_snoop
max : core.tools.generator.item.enum.IntegerItem , core.tools.generator.item.integer.IntegerItem
mbc : brm_regs
MCFG1 : Mctrl
MCFG1_BEXCN : Mctrl
MCFG1_BEXCN_DEFAULT : Mctrl
MCFG1_DEFAULT : Mctrl
MCFG1_IBRDY : Mctrl
MCFG1_IBRDY_DEFAULT : Mctrl
MCFG1_IO_WAITSTATES : Mctrl
MCFG1_IO_WAITSTATES_DEFAULT : Mctrl
MCFG1_IO_WIDTH : Mctrl
MCFG1_IOBUSW : Mctrl
MCFG1_IOBUSW_DEFAULT : Mctrl
MCFG1_IOEN : Mctrl
MCFG1_IOEN_DEFAULT : Mctrl
MCFG1_PROM_READ_WS : Mctrl
MCFG1_PROM_READ_WS_DEFAULT : Mctrl
MCFG1_PROM_WIDTH : Mctrl
MCFG1_PROM_WIDTH_DEFAULT : Mctrl
MCFG1_PROM_WRITE_WS : Mctrl
MCFG1_PROM_WRITE_WS_DEFAULT : Mctrl
MCFG1_PWEN : Mctrl
MCFG1_PWEN_DEFAULT : Mctrl
MCFG1_WRITE_MASK : Mctrl
MCFG2 : Mctrl
MCFG2_D64 : Mctrl
MCFG2_D64_DEFAULT : Mctrl
MCFG2_DEFAULT : Mctrl
MCFG2_MS : Mctrl
MCFG2_MS_DEFAULT : Mctrl
MCFG2_RAM_BANK_SIZE : Mctrl
MCFG2_RAM_BANK_SIZE_DEFAULT : Mctrl
MCFG2_RAM_READ_WS : Mctrl
MCFG2_RAM_READ_WS_DEFAULT : Mctrl
MCFG2_RAM_WIDTH : Mctrl
MCFG2_RAM_WIDTH_DEFAULT : Mctrl
MCFG2_RAM_WRITE_WS : Mctrl
MCFG2_RAM_WRITE_WS_DEFAULT : Mctrl
MCFG2_RBRDY : Mctrl
MCFG2_RBRDY_DEFAULT : Mctrl
MCFG2_RMW : Mctrl
MCFG2_RMW_DEFAULT : Mctrl
MCFG2_SDRAM_BANKSZ : Mctrl
MCFG2_SDRAM_BANKSZ_DEFAULT : Mctrl
MCFG2_SDRAM_CMD : Mctrl
MCFG2_SDRAM_CMD_DEFAULT : Mctrl
MCFG2_SDRAM_COSZ : Mctrl
MCFG2_SDRAM_COSZ_DEFAULT : Mctrl
MCFG2_SDRAM_TRFC : Mctrl
MCFG2_SDRAM_TRFC_DEFAULT : Mctrl
MCFG2_SDRF : Mctrl
MCFG2_SDRF_DEFAULT : Mctrl
MCFG2_SE : Mctrl
MCFG2_SE_DEFAULT : Mctrl
MCFG2_SI : Mctrl
MCFG2_SI_DEFAULT : Mctrl
MCFG2_TCAS : Mctrl
MCFG2_TCAS_DEFAULT : Mctrl
MCFG2_TRP : Mctrl
MCFG2_TRP_DEFAULT : Mctrl
MCFG2_WRITE_MASK : Mctrl
MCFG3 : Mctrl
MCFG3_DEFAULT : Mctrl
MCFG3_SDRAM_RLD_VAL : Mctrl
MCFG3_WRITE_MASK : Mctrl
MCFG4 : Mctrl
MCFG4_CE : Mctrl
MCFG4_CE_DEFAULT : Mctrl
MCFG4_DC : Mctrl
MCFG4_DEFAULT : Mctrl
MCFG4_DS_DEFAULT : Mctrl
MCFG4_EM : Mctrl
MCFG4_EM_DEFAULT : Mctrl
MCFG4_ME : Mctrl
MCFG4_ME_DEFAULT : Mctrl
MCFG4_PASR : Mctrl
MCFG4_PASR_DEFAULT : Mctrl
MCFG4_PMODE : Mctrl
MCFG4_PMODE_DEFAULT : Mctrl
MCFG4_TCSR : Mctrl
MCFG4_TCSR_DEFAULT : Mctrl
MCFG4_TXSR : Mctrl
MCFG4_TXSR_DEFAULT : Mctrl
MCFG4_WRITE_MASK : Mctrl
mcpoint : brm_regs
mdpoint : brm_regs
mds : dcache_out_type , icache_out_type
mem : ahbpp_type , apbpp_type , leon3_funclt_trap::Processor_leon3_funclt , Mctrl , Memory
membase : satcan_regs
memcfg1 : l2regs
memcfg2 : l2regs
memory : Top
memstatus : ahbstat , l2regs
message : trap::GDBResponse
mexc : dcache_out_type , icache_out_type
mfilta : brm_regs
mfiltb : brm_regs
min : core.tools.generator.item.enum.IntegerItem , core.tools.generator.item.integer.IntegerItem
mmu_cache : Leon3Processor
MMU_CONTEXT_REG : mmu
MMU_CONTEXT_TABLE_POINTER_REG : mmu
MMU_CONTROL_REG : mmu
MMU_FAULT_ADDRESS_REG : mmu
MMU_FAULT_STATUS_REG : mmu
mnemonic : scireg_ns::scireg_value_info , trap::HistoryInstrType
mode : ReliabilityCell< WIDTH > , spictrlregs
model : core.tools.generator.item.item.Item , core.tools.generator.wizard.config.ConfigPage
module : core.waf.swig.swig
MP_STAT : Irqmp
MP_STAT_DEFAULT : Irqmp
MP_STAT_EIRQ : Irqmp
MP_STAT_NCPU : Irqmp
MP_STAT_WMASK : Irqmp
MPROC_ID : leon3_funclt_trap::Processor_leon3_funclt
mpstat : brm_irq_reg , irq_reg
mpstatus : irqmp
msg_buffer : usi.log.db_reporter.Logger
msk : i2cslv_regs
msu : dcache_in_type
my_value : sr_param_t< T >