SoCRocket
Transaction-Level Modeling Framework for Space Applications
SoCRocket
Transaction-Level Modeling Framework for Space Applications
Top-level class of the memory sub-system for the TrapGen LEON3 simulator. More...
#include <mmu_cache.h>
Public Member Functions | |
| GC_HAS_CALLBACKS () | |
| SC_HAS_PROCESS (mmu_cache) | |
| SR_HAS_SIGNALS (mmu_cache) | |
| mmu_cache (ModuleName name="", bool icen=true, uint32_t irepl=1, uint32_t isets=4, uint32_t ilinesize=8, uint32_t isetsize=8, uint32_t isetlock=true, uint32_t dcen=true, uint32_t drepl=1, uint32_t dsets=2, uint32_t dlinesize=4, uint32_t dsetsize=8, bool dsetlock=true, bool dsnoop=true, bool ilram=false, uint32_t ilramsize=0x000, uint32_t ilramstart=0x000, uint32_t dlram=false, uint32_t dlramsize=0x000, uint32_t dlramstart=0x000, uint32_t cached=0, bool mmu_en=true, uint32_t itlb_num=8, uint32_t dtlb_num=8, uint32_t tlb_type=0, uint32_t tlb_rep=1, uint32_t mmupgsz=0, uint32_t hindex=0, bool pow_mon=false, AbstractionLayer ambaLayer=amba::amba_LT) | |
| Constructor of the top-level class of the memory sub-system (caches and mmu). More... | |
| ~mmu_cache () | |
| void | exec_instr (tlm::tlm_generic_payload &trans, sc_core::sc_time &delay, bool is_dbg) |
| Instruction interface to functional part of the model. More... | |
| void | exec_data (tlm::tlm_generic_payload &trans, sc_core::sc_time &delay, bool is_dbg) |
| Data interface to functional part of the model. More... | |
| void | icio_b_transport (tlm::tlm_generic_payload &payload, sc_core::sc_time &delay) |
| TLM blocking forward transport function for icio socket. More... | |
| void | dcio_b_transport (tlm::tlm_generic_payload &payload, sc_core::sc_time &delay) |
| TLM blocking forward transport function for dcio socket. More... | |
| tlm::tlm_sync_enum | icio_nb_transport_fw (tlm::tlm_generic_payload &payload, tlm::tlm_phase &phase, sc_core::sc_time &delay) |
| TLM non-blocking forward transport function for icio socket. More... | |
| tlm::tlm_sync_enum | dcio_nb_transport_fw (tlm::tlm_generic_payload &payload, tlm::tlm_phase &phase, sc_core::sc_time &delay) |
| TLM non-blocking forward transport function for dcio socket. More... | |
| unsigned int | icio_transport_dbg (tlm::tlm_generic_payload &trans) |
| TLM instruction debug transport. More... | |
| unsigned int | dcio_transport_dbg (tlm::tlm_generic_payload &trans) |
| TLM data debug transport. More... | |
| void | icio_service_thread () |
| Instruction service thread for AT. More... | |
| void | dcio_service_thread () |
| Data service thread for AT. More... | |
| virtual void | tlb_flush () |
| TLB flush complete. More... | |
| virtual void | tlb_flush (uint32_t vpn) |
| TLB flush certain entry. More... | |
 Public Member Functions inherited from mmu_cache_base | |
| GC_HAS_CALLBACKS () | |
| SC_HAS_PROCESS (mmu_cache_base) | |
| SR_HAS_SIGNALS (mmu_cache_base) | |
| mmu_cache_base (ModuleName name="", bool icen=true, uint32_t irepl=1, uint32_t isets=4, uint32_t ilinesize=8, uint32_t isetsize=8, uint32_t isetlock=true, uint32_t dcen=true, uint32_t drepl=1, uint32_t dsets=2, uint32_t dlinesize=4, uint32_t dsetsize=8, bool dsetlock=true, bool dsnoop=true, bool ilram=false, uint32_t ilramsize=0x000, uint32_t ilramstart=0x000, uint32_t dlram=false, uint32_t dlramsize=0x000, uint32_t dlramstart=0x000, uint32_t cached=0, bool mmu_en=true, uint32_t itlb_num=8, uint32_t dtlb_num=8, uint32_t tlb_type=0, uint32_t tlb_rep=1, uint32_t mmupgsz=0, uint32_t hindex=0, bool pow_mon=false, AbstractionLayer ambaLayer=amba::amba_LT) | |
| Constructor of the top-level class of the memory sub-system (caches and mmu). More... | |
| ~mmu_cache_base () | |
| virtual void | exec_instr (const unsigned int &addr, unsigned char *ptr, unsigned int asi, unsigned int *debug, const unsigned int &flush, sc_core::sc_time &delay, bool is_dbg) |
| Instruction interface to functional part of the model. More... | |
| virtual void | exec_data (const tlm::tlm_command cmd, const unsigned int &addr, unsigned char *ptr, unsigned int len, unsigned int asi, unsigned int *debug, unsigned int flush, unsigned int lock, sc_core::sc_time &delay, bool is_dbg, tlm::tlm_response_status &response) |
| Data interface to functional part of the model. More... | |
| virtual void | response_callback (tlm::tlm_generic_payload *trans) |
| Called from AHB master to signal begin response. More... | |
| virtual void | mem_write (unsigned int addr, unsigned int asi, unsigned char *data, unsigned int length, sc_core::sc_time *t, unsigned int *debug, bool is_dbg, bool &cacheable, bool is_lock) |
| MemIF implementation - writes data to AHB master. More... | |
| virtual bool | mem_read (unsigned int addr, unsigned int asi, unsigned char *data, unsigned int length, sc_core::sc_time *t, unsigned int *debug, bool is_dbg, bool &cacheable, bool is_lock) |
| MemIF implementation - reads data from AHB master. More... | |
| virtual void | set_irq (uint32_t tt) |
| Send an interrupt over the central IRQ interface. More... | |
| virtual void | trigger_exception (unsigned int exception)=0 |
| Sent an exception to the CPU. More... | |
| void | write_ccr (unsigned char *data, unsigned int len, sc_core::sc_time *delay, unsigned int *debug, bool is_dbg) |
| Writes the cache control register. More... | |
| virtual unsigned int | read_ccr (bool internal) |
| Read the cache control register. More... | |
| void | snoopingCallBack (const t_snoop &snoop, const sc_core::sc_time &delay) |
| Snooping function (For calling dcache->snoop_invalidate) More... | |
| void | start_of_simulation () |
| Automatically called at the beginning of the simulation. More... | |
| void | power_model () |
| Calculate power/energy values from normalized input data. More... | |
| gs::cnf::callback_return_type | sta_power_cb (gs::gs_param_base &changed_param, gs::cnf::callback_type reason) |
| Static power callback. More... | |
| gs::cnf::callback_return_type | int_power_cb (gs::gs_param_base &changed_param, gs::cnf::callback_type reason) |
| Dynamic/Internal power callback. More... | |
| gs::cnf::callback_return_type | swi_power_cb (gs::gs_param_base &changed_param, gs::cnf::callback_type reason) |
| Dynamic/Switching power callback. More... | |
| void | end_of_simulation () |
| Called at end of simulation to print execution statistics. More... | |
| void | dorst () |
| Reset function. More... | |
| void | clkcng () |
| Deal with clock changes. More... | |
| sc_core::sc_time | get_clock () |
| Return clock period (for ahb interface) More... | |
| Public Member Functions inherited from AHBMaster<> | |
| SC_HAS_PROCESS (AHBMaster) | |
| AHBMaster (ModuleName nm, uint8_t hindex, uint8_t vendor, uint8_t device, uint8_t version, uint8_t irq, AbstractionLayer ambaLayer, BAR bar0=BAR(), BAR bar1=BAR(), BAR bar2=BAR(), BAR bar3=BAR()) | |
| Constructor. More... | |
| ~AHBMaster () | |
| Destructor. More... | |
| virtual void | ahbread (uint32_t addr, unsigned char *data, uint32_t length) |
| Read data from AHB (SC_ZERO_TIME version) More... | |
| virtual void | ahbread (uint32_t addr, unsigned char *data, uint32_t length, sc_core::sc_time &delay, bool &cacheable, tlm::tlm_response_status &response) |
| Read data from AHB. More... | |
| virtual void | ahbread (uint32_t addr, unsigned char *data, uint32_t length, sc_core::sc_time &delay, bool &cacheable, bool is_lock, tlm::tlm_response_status &response) |
| Read data from AHB. More... | |
| virtual void | ahbwrite (uint32_t addr, unsigned char *data, uint32_t length) |
| Write data to AHB (SC_ZERO_TIME version) More... | |
| virtual void | ahbwrite (uint32_t addr, unsigned char *data, uint32_t length, sc_core::sc_time &delay, tlm::tlm_response_status &response) |
| Write data to AHB. More... | |
| virtual void | ahbwrite (uint32_t addr, unsigned char *data, uint32_t length, sc_core::sc_time &delay, bool is_lock, tlm::tlm_response_status &response) |
| Write data to AHB. More... | |
| virtual void | ahbaccess (tlm::tlm_generic_payload *trans) |
| Generic AHB access function (blocking and non-blocking) More... | |
| virtual uint32_t | ahbaccess_dbg (tlm::tlm_generic_payload *trans) |
| Generic AHB debug access function. More... | |
| virtual uint32_t | ahbread_dbg (uint32_t addr, unsigned char *data, uint32_t length) |
| Debug read from AHB. More... | |
| virtual uint32_t | ahbwrite_dbg (uint32_t addr, unsigned char *data, uint32_t length) |
| Debug write from AHB. More... | |
| virtual tlm::tlm_sync_enum | nb_transport_bw (tlm::tlm_generic_payload &payload, tlm::tlm_phase &phase, sc_core::sc_time &delay) |
| TLM non-blocking backward transport function. More... | |
| void | ResponseThread () |
| Thread for response processing (read) More... | |
| void | DataThread () |
| Thread for processing data-phase of write transactions. More... | |
| virtual void | transport_statistics (tlm::tlm_generic_payload &gp) throw () |
| Collect common transport statistics. More... | |
| virtual void | print_transport_statistics (const char *name) const throw () |
| Print common transport statistics. More... | |
| Public Member Functions inherited from AHBDevice< BaseModule< DefaultBase > > | |
| AHBDevice (ModuleName mn, uint32_t hindex, uint8_t vendorid, uint16_t deviceid, uint8_t version, uint8_t irq, BAR bar0, BAR bar1=BAR(), BAR bar2=BAR(), BAR bar3=BAR()) | |
| AHBDevice (ModuleName mn) | |
| void | init (uint32_t hindex, uint8_t vendorid, uint16_t deviceid, uint8_t version, uint8_t irq, BAR bar0, BAR bar1=BAR(), BAR bar2=BAR(), BAR bar3=BAR()) |
| void | init_ahb_generics () |
| virtual | ~AHBDevice () |
| Empty destructor. More... | |
| virtual const uint16_t | get_ahb_device_id () const throw () |
| Returns the device id. More... | |
| virtual const uint8_t | get_ahb_vendor_id () const throw () |
| Returns the vendor id. More... | |
| virtual const uint32_t * | get_ahb_device_info () throw () |
| virtual const uint32_t | get_ahb_base_addr_ () const throw () |
| virtual sc_dt::uint64 | get_ahb_base_addr () throw () |
| virtual const uint32_t | get_ahb_size_ () const throw () |
| virtual sc_dt::uint64 | get_ahb_size () throw () |
| virtual const AMBADeviceType | get_ahb_bar_type (uint32_t bar) const throw () |
| virtual const uint32_t | get_ahb_bar_base (uint32_t bar) const throw () |
| virtual const uint32_t | get_ahb_bar_mask (uint32_t bar) const throw () |
| virtual const uint32_t | get_ahb_bar_addr (uint32_t bar) const throw () |
| virtual const uint32_t | get_ahb_bar_size (uint32_t bar) const throw () |
| virtual const uint32_t | get_ahb_bar_relative_addr (uint32_t bar, uint32_t addr) const throw () |
| const bool | get_ahb_bar_prefetchable (uint32_t bar) const throw () |
| const bool | get_ahb_bar_cachable (uint32_t bar) const throw () |
| virtual const uint32_t | get_ahb_hindex () const throw () |
| Returns the bus id of the module (hindex) More... | |
| virtual void | print_ahb_device_info (char *name) const |
| Prints the device info of the device. More... | |
| Public Member Functions inherited from BaseModule< DefaultBase > | |
| BaseModule (ModuleName mn) | |
| virtual | ~BaseModule () |
| virtual void | init_generics () |
| virtual void | init_registers () |
| virtual void | init_counters () |
| virtual void | init_power () |
| Public Member Functions inherited from AHBDeviceBase | |
| virtual | ~AHBDeviceBase () |
| Empty destructor. More... | |
| Public Member Functions inherited from mmu_cache_if | |
| virtual | ~mmu_cache_if () |
| Public Member Functions inherited from mem_if | |
| virtual | ~mem_if () |
| Public Member Functions inherited from CLKDevice | |
| SR_HAS_SIGNALS (CLKDevice) | |
| CLKDevice () | |
| virtual | ~CLKDevice () |
| virtual void | onrst (const bool &value, const sc_core::sc_time &time) |
| virtual void | onclk (const sc_core::sc_time &value, const sc_core::sc_time &time) |
| void | set_clk (sc_core::sc_clock &clk) |
| void | set_clk (sc_core::sc_time period) |
| void | set_clk (double period, sc_core::sc_time_unit base) |
Public Attributes | |
| tlm_utils::simple_target_socket < mmu_cache > | icio |
| tlm_utils::simple_target_socket < mmu_cache > | dcio |
| signal< t_snoop >::in | snoop |
| signal< std::pair< uint32_t, bool > >::out | irq |
| tlm_utils::peq_with_get < tlm::tlm_generic_payload > | icio_PEQ |
| tlm_utils::peq_with_get < tlm::tlm_generic_payload > | dcio_PEQ |
| Public Attributes inherited from mmu_cache_base | |
| signal< t_snoop >::in | snoop |
| signal< std::pair< uint32_t, bool > >::out | irq |
| cache_if * | icache |
| instruction cache pointer More... | |
| cache_if * | dcache |
| data cache pointer More... | |
| mmu * | m_mmu |
| mmu poiner More... | |
| localram * | ilocalram |
| instruction scratchpad pointer More... | |
| localram * | dlocalram |
| data scratchpad pointer More... | |
| Public Attributes inherited from AHBMaster<> | |
| amba::amba_master_socket< 32 > | ahb |
| The AHB master socketo. More... | |
| Public Attributes inherited from CLKDevice | |
| signal< bool >::in | rst |
| Reset input signal. More... | |
| signal< sc_core::sc_time >::in | clk |
| Clock input signal. More... | |
Additional Inherited Members | |
| Protected Member Functions inherited from mmu_cache_base | |
| void | mem_access () |
| Protected Attributes inherited from mmu_cache_base | |
| unsigned int | CACHE_CONTROL_REG |
| unsigned int | m_icen |
| icache enable More... | |
| unsigned int | m_dcen |
| dcache enabled More... | |
| unsigned int | m_dsnoop |
| dcache snooping enabled More... | |
| unsigned int | m_ilram |
| instruction scratchpad enabled More... | |
| unsigned int | m_ilramstart |
| instruction scratchpad starting address More... | |
| unsigned int | m_dlram |
| data scratchpad enabled More... | |
| unsigned int | m_dlramstart |
| data scratchpad starting address More... | |
| unsigned int | m_cached |
| enables fixed cacheability mask More... | |
| unsigned int | m_mmu_en |
| mmu enabled More... | |
| unsigned int | m_master_id |
| amba master id More... | |
| unsigned char | write_buf [1024] |
| unsigned int | wb_pointer |
| sc_event | bus_read_completed |
| tlm::tlm_fifo < tlm::tlm_generic_payload * > | bus_in_fifo |
| sr_param< uint64_t > | m_right_transactions |
| Total number of successful transactions for execution statistics. More... | |
| sr_param< uint64_t > | m_total_transactions |
| Total number of transactions for execution statistics. More... | |
| bool | m_pow_mon |
| power monitoring enabled More... | |
| AbstractionLayer | m_abstractionLayer |
| amba abstraction layer More... | |
| sc_event | ahb_response_event |
| begin response signal for AT More... | |
| sr_param< double > | sta_power_norm |
| Normalized static power of controller. More... | |
| sr_param< double > | int_power_norm |
| Normalized internal power of controller. More... | |
| sr_param< double > | dyn_read_energy_norm |
| Normalized read access energy. More... | |
| sr_param< double > | dyn_write_energy_norm |
| Normalized write access energy. More... | |
| sr_param< double > | sta_power |
| Controller static power. More... | |
| sr_param< double > | int_power |
| Controller internal power. More... | |
| sr_param< double > | swi_power |
| Controller switching power. More... | |
| sr_param< sc_core::sc_time > | power_frame_starting_time |
| Power frame starting time. More... | |
| sr_param< double > | dyn_read_energy |
| Dynamic energy per read access. More... | |
| sr_param< double > | dyn_write_energy |
| Dynamic energy per write access. More... | |
| sr_param< uint64_t > | dyn_reads |
| Number of reads from memory (read & reset by monitor) More... | |
| sr_param< uint64_t > | dyn_writes |
| Number of writes to memory (read & reset by monitor) More... | |
| uint64_t | globl_count |
| Protected Attributes inherited from AHBMaster<> | |
| tlm_utils::peq_with_get < tlm::tlm_generic_payload > | m_ResponsePEQ |
| PEQs for response synchronization. More... | |
| sc_event | m_EndRequestEvent |
| Events for phase notifications. More... | |
| AbstractionLayer | m_ambaLayer |
| The abstraction layer of the instance (LT or AT) More... | |
| sr_param< uint64_t > | m_reads |
| Stores the number of Bytes read from the device. More... | |
| sr_param< uint64_t > | m_writes |
| Stores the number of Bytes written from the device. More... | |
| bool | response_error |
| Protected Attributes inherited from AHBDevice< BaseModule< DefaultBase > > | |
| uint32_t | m_register [8] |
| Impementation of the device register file. More... | |
| ParameterArray | g_bars |
| ParameterArray | g_bar0 |
| ParameterArray | g_bar1 |
| ParameterArray | g_bar2 |
| ParameterArray | g_bar3 |
| sr_param< uint32_t > | g_hindex |
| sr_param< uint8_t > | g_hvendorid |
| sr_param< uint16_t > | g_hdeviceid |
| sr_param< uint8_t > | g_hversion |
| sr_param< uint8_t > | g_hirq |
| sr_param< uint32_t > | g_bar0haddr |
| sr_param< uint32_t > | g_bar0hmask |
| sr_param< uint32_t > | g_bar0htype |
| sr_param< bool > | g_bar0hcacheable |
| sr_param< bool > | g_bar0hprefetchable |
| sr_param< uint32_t > | g_bar1haddr |
| sr_param< uint32_t > | g_bar1hmask |
| sr_param< uint32_t > | g_bar1htype |
| sr_param< bool > | g_bar1hcacheable |
| sr_param< bool > | g_bar1hprefetchable |
| sr_param< uint32_t > | g_bar2haddr |
| sr_param< uint32_t > | g_bar2hmask |
| sr_param< uint32_t > | g_bar2htype |
| sr_param< bool > | g_bar2hcacheable |
| sr_param< bool > | g_bar2hprefetchable |
| sr_param< uint32_t > | g_bar3haddr |
| sr_param< uint32_t > | g_bar3hmask |
| sr_param< uint32_t > | g_bar3htype |
| sr_param< bool > | g_bar3hcacheable |
| sr_param< bool > | g_bar3hprefetchable |
| Protected Attributes inherited from BaseModule< DefaultBase > | |
| ParameterAPI * | m_api |
| Internal module gs param api instance. More... | |
| ParameterArray | m_generics |
| Configuration generic container. More... | |
| ParameterArray | m_counters |
| Performance counter container. More... | |
| ParameterArray | m_power |
| Power counters container. More... | |
| Protected Attributes inherited from CLKDevice | |
| sc_core::sc_time | clock_cycle |
Top-level class of the memory sub-system for the TrapGen LEON3 simulator.
| mmu_cache::GC_HAS_CALLBACKS | ( | ) |
| mmu_cache::SC_HAS_PROCESS | ( | mmu_cache | ) |
| mmu_cache::SR_HAS_SIGNALS | ( | mmu_cache | ) |
|
virtual |
TLB flush complete.
|
virtual |
TLB flush certain entry.
| tlm_utils::simple_target_socket<mmu_cache> mmu_cache::dcio |
Referenced by dcio_service_thread(), and mmu_cache().
| tlm_utils::peq_with_get<tlm::tlm_generic_payload> mmu_cache::dcio_PEQ |
Referenced by dcio_nb_transport_fw(), dcio_service_thread(), and mmu_cache().
| tlm_utils::simple_target_socket<mmu_cache> mmu_cache::icio |
Referenced by icio_service_thread(), and mmu_cache().
| tlm_utils::peq_with_get<tlm::tlm_generic_payload> mmu_cache::icio_PEQ |
Referenced by icio_nb_transport_fw(), icio_service_thread(), and mmu_cache().
| signal<t_snoop>::in mmu_cache::snoop |